diff options
| author | Alasdair Armstrong | 2018-07-05 19:09:26 +0100 |
|---|---|---|
| committer | Alasdair Armstrong | 2018-07-05 19:11:21 +0100 |
| commit | 9a0cbbedbe281807f70bf2206756624315096642 (patch) | |
| tree | b4bab037fd3e68444d9a15b709d6e9ee5ebe769f /test/c/cheri_capreg.expect | |
| parent | e5654331c24391e984484e590993887b499af9f8 (diff) | |
Fix CHERI test that was failing when compiled to C
Non bitvector literals for decreasing vectors were not being reversed
correctly, so the list of capability registers was effectively in
reverse order.
Added a test case to test/c/ based on this aspect of CHERI
Diffstat (limited to 'test/c/cheri_capreg.expect')
| -rw-r--r-- | test/c/cheri_capreg.expect | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/test/c/cheri_capreg.expect b/test/c/cheri_capreg.expect new file mode 100644 index 00000000..6e46a0e8 --- /dev/null +++ b/test/c/cheri_capreg.expect @@ -0,0 +1,10 @@ +default_cap = 0b10000000000000000000000000000000011111111111111110000111111111110000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001111111111111111111111111111111111111111111111111111111111111111 +null_cap = 0b00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001111111111111111111111111111111111111111111111111111111111111111 +C03 = 0b00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +C02 = 0b00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +C01 = 0b00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +DDC = 0b10000000000000000000000000000000011111111111111110000111111111110000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001111111111111111111111111111111111111111111111111111111111111111 +C03 = 0b00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001111111111111111111111111111111111111111111111111111111111111111 +C02 = 0b00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001111111111111111111111111111111111111111111111111111111111111111 +C01 = 0b00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001111111111111111111111111111111111111111111111111111111111111111 +DDC = 0b10000000000000000000000000000000011111111111111110000111111111110000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001111111111111111111111111111111111111111111111111111111111111111 |