diff options
| author | Kathy Gray | 2014-07-25 10:54:16 +0100 |
|---|---|---|
| committer | Kathy Gray | 2014-07-25 10:54:16 +0100 |
| commit | 2d74c82744130c744a216200f9bb5358ffdc9c51 (patch) | |
| tree | b9f234053a8b66bce83f6db581ebdf793a8db24c /src | |
| parent | cf267a6d0f0b65c74c78fc3cf13e2175e49aea68 (diff) | |
Additional functions for interface
Diffstat (limited to 'src')
| -rw-r--r-- | src/lem_interp/interp_interface.lem | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/src/lem_interp/interp_interface.lem b/src/lem_interp/interp_interface.lem index 4d8cc82c..3d4b2e6d 100644 --- a/src/lem_interp/interp_interface.lem +++ b/src/lem_interp/interp_interface.lem @@ -52,3 +52,10 @@ val interp : interp_mode -> instruction_state -> outcome val interp_exhaustive : instruction_state -> list event +val mem_read_analysis : instruction_state -> list event (*Should record all rreg events where the registers are involved in memory reads to compute the addressses in is*) + +val mem_write_analysis : instruction_state -> list event (*Should record all rreg events where the registers are involved in memory writes to compute the address (and value?, in a separate list?)*) + + +(*Questions : isync? any other special instructions that we need to inform the memory model etc. about + : let's look again at conditional memory instructions, based on the book *) |
