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authorGabriel Kerneis2014-03-12 16:31:24 +0000
committerGabriel Kerneis2014-03-12 16:31:24 +0000
commit2a6a69df9575c7b704e53606385bd43bbad5ec12 (patch)
tree787714e1f6c7946c52aa3f4b7150daf92378e8f8 /src
parentc209835410c323f90258fcb8ccf84514dda831af (diff)
Remove automagic register initialization
Diffstat (limited to 'src')
-rw-r--r--src/lem_interp/run_interp.ml10
1 files changed, 0 insertions, 10 deletions
diff --git a/src/lem_interp/run_interp.ml b/src/lem_interp/run_interp.ml
index c9222463..71719554 100644
--- a/src/lem_interp/run_interp.ml
+++ b/src/lem_interp/run_interp.ml
@@ -101,16 +101,6 @@ let id_compare i1 i2 =
module Reg = struct
include Map.Make(struct type t = id let compare = id_compare end)
-
- let zero_vec =
- V_vector (zero_big_int, true, Array.to_list (Array.make 64
- (V_lit(L_aux(L_zero, Unknown)))))
-
- let find id reg =
- try find id reg
- with Not_found ->
- (* default to a 64-bit big-endian vector of zero bits *)
- zero_vec
end ;;
module Mem = struct