diff options
| author | Gabriel Kerneis | 2014-06-07 12:38:42 +0100 |
|---|---|---|
| committer | Gabriel Kerneis | 2014-06-07 12:38:42 +0100 |
| commit | 24d919c7a13875364fedc80d53013caa7d5f8745 (patch) | |
| tree | 6c6d35e564fceb41fddfcf03aec6e3a44198d671 /src | |
| parent | 9a7e3e81200de80a92e3ba3ad8c4077c70a95b12 (diff) | |
Don't use cycle for fetch-decode-execute
Diffstat (limited to 'src')
| -rw-r--r-- | src/test/power.sail | 4 | ||||
| -rw-r--r-- | src/test/run_power.ml | 6 |
2 files changed, 5 insertions, 5 deletions
diff --git a/src/test/power.sail b/src/test/power.sail index dfe6c471..76dbd099 100644 --- a/src/test/power.sail +++ b/src/test/power.sail @@ -193,8 +193,8 @@ end ast register ast instr (* monitor decoded instructions *) -(* fetch-decode-execute cycle *) -function unit cycle () = { +(* fetch-decode-execute *) +function unit fde () = { NIA := CIA + 4; instr := decode(MEM(CIA, 4)); execute(instr); diff --git a/src/test/run_power.ml b/src/test/run_power.ml index dfc6eddd..c47b60d3 100644 --- a/src/test/run_power.ml +++ b/src/test/run_power.ml @@ -104,7 +104,7 @@ let get_reg reg name = ;; let rec fde_loop count entry mem reg prog = - debugf "\n**** cycle %d ****\n" count; + debugf "\n**** instruction %d ****\n" count; match Run_interp.run ~entry ~mem ~reg ~eager_eval:!eager_eval prog with | false, _ -> eprintf "FAILURE\n"; exit 1 | true, (reg, mem) -> @@ -132,8 +132,8 @@ let run () = eprintf "done. (%f seconds)\n%!" t; close_in ic; let reg = init_reg () in - (* entry point: unit -> unit cycle *) - let entry = E_aux(E_app(Id_aux((Id "cycle"),Unknown), + (* entry point: unit -> unit fde *) + let entry = E_aux(E_app(Id_aux((Id "fde"),Unknown), [E_aux(E_lit (L_aux(L_unit,Unknown)),(Unknown,None))]),(Unknown,None)) in let name = Filename.basename !file in let t =time_it (fun () -> fde_loop 0 entry !mem reg (name, Power.defs)) () in |