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| author | Gabriel Kerneis | 2014-02-14 15:00:56 +0000 |
|---|---|---|
| committer | Gabriel Kerneis | 2014-02-14 15:00:56 +0000 |
| commit | dd815a8b7c2a52cecf679f0319a3141469cfb08e (patch) | |
| tree | cbba7f5f4e9969ec7acc522daf11b3dd1a462705 /src/test/vectors.sail | |
| parent | 4562c36b1c9fb8364a2f1482d9649dd4dc50d060 (diff) | |
Infinite loop in interpreter for register slice write
I believe the issue is on the Lem side, but I might be doing something
wrong on the OCaml side too.
Diffstat (limited to 'src/test/vectors.sail')
| -rw-r--r-- | src/test/vectors.sail | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/test/vectors.sail b/src/test/vectors.sail index 63e758fa..70cc5973 100644 --- a/src/test/vectors.sail +++ b/src/test/vectors.sail @@ -44,6 +44,8 @@ function bit main _ = { (* slice update *) i[0] := bitzero; + i[2 .. 3] := [bitone, bitone]; + (* slice access of literal *) v[0]; } |