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authorKathy Gray2014-03-12 14:16:48 +0000
committerKathy Gray2014-03-12 14:16:48 +0000
commitc209835410c323f90258fcb8ccf84514dda831af (patch)
tree8c1ac68189d65f4ba99200f38239ae4362cbbb13 /src/test/vectors.sail
parent9abe43c6edb3439c23490d09cae4b71ed64c98db (diff)
Correctly type checking and interpreting accesses of register "fields". Register-reading action isn't reading the subreg correctly still (seems to be making up a value though).
Corrects but to vectors.sail and power.sail use of plus. (A new bug in power.sail is exposed using a binary operator with one value)
Diffstat (limited to 'src/test/vectors.sail')
-rw-r--r--src/test/vectors.sail2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/test/vectors.sail b/src/test/vectors.sail
index e13644b4..c7fd6d77 100644
--- a/src/test/vectors.sail
+++ b/src/test/vectors.sail
@@ -19,7 +19,7 @@ function bit main _ = {
slice_check := v3[1..10];
slice_check := v3[5..10];
- gpr_small[1] := v3;
+ gpr_small[1] := v3; (*Writes to slice_check*)
slice_check_copy := gpr_small[1];
i := [bitzero, bitzero, bitone, bitzero];