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authorGabriel Kerneis2014-03-20 12:05:07 +0000
committerGabriel Kerneis2014-03-20 12:05:07 +0000
commite6b5c6b60d9c732bcc4fd685d8d58ef5646a553c (patch)
tree0d1d346c33f6ce84170c6c31f59a49579bdeb91d /src/test/test3.sail
parent21d4d557a169944724bf5774844f7b26b49ac968 (diff)
More tests for implicit casts
The last test added in vectors.sail fails.
Diffstat (limited to 'src/test/test3.sail')
-rw-r--r--src/test/test3.sail11
1 files changed, 9 insertions, 2 deletions
diff --git a/src/test/test3.sail b/src/test/test3.sail
index b07ffb7d..778d323a 100644
--- a/src/test/test3.sail
+++ b/src/test/test3.sail
@@ -1,5 +1,7 @@
(* a register containing nat numbers *)
register nat dummy_reg
+(* and one containing a byte *)
+register (bit[8]) dummy_reg2
(* a function to read from memory; wmem serves no purpose currently,
memory-writing functions are figured out syntactically. *)
val extern nat -> nat effect { wmem , rmem } MEM
@@ -54,6 +56,11 @@ function nat main _ = {
ignore(MEM_SIZE(0,2));
(* extern calls *)
- ignore(3 + 39);
- add(5, 37);
+ dummy_reg := 3 + 39;
+ dummy_reg := add(5, 37);
+ (* casts and external calls *)
+ dummy_reg := 0b01 + 0b01;
+ dummy_reg2 := dummy_reg; (* cast from nat to bit[8] *)
+ dummy_reg2 := dummy_reg2 + dummy_reg2; (* cast to nat for add call *)
+ dummy_reg2; (* cast again and return 4 *)
}