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authorGabriel Kerneis2014-04-03 17:21:48 +0100
committerGabriel Kerneis2014-04-03 17:28:45 +0100
commit6211671cf52fb51aafe46438ba408d3e3e009734 (patch)
treeae4b0f807baa806cdf31e3990c0231c0df2808ec /src/test/power.sail
parent731bff8e40537176972741014cd88ace55a58742 (diff)
Power example now EXECUTES (almost) CORRECTLY! \o/
Warning: we set the link register to the address of the first instruction, which means the program is effectively an infinite loop returning 42 forever. (Except it slows down and leaks memory, probably because the interpreter doesn't optimise the tail call in fde_loop.) 42, 42, 42, 42, 42, 42, 42, 42, ...
Diffstat (limited to 'src/test/power.sail')
-rw-r--r--src/test/power.sail9
1 files changed, 8 insertions, 1 deletions
diff --git a/src/test/power.sail b/src/test/power.sail
index a01e8cfa..e75e24ef 100644
--- a/src/test/power.sail
+++ b/src/test/power.sail
@@ -96,7 +96,7 @@ val extern ( nat , nat ) -> (bit[64]) effect { wmem , rmem } MEM
(* XXX effect for trap? *)
val extern unit -> unit effect pure trap
-(* XXX *)
+(* XXX should be register<bool>, this is a workaround for limitations in coercions *)
let (bit) mode64bit = bitone
scattered function unit execute
@@ -206,6 +206,13 @@ function unit init() = {
only saved in restore in our simple example. *)
GPR31 := 0;
+ (* unused in practice, but must be set for bclr computation *)
+ CTR := 0;
+ CR := 0;
+ (* return address -- I have no idea what to put there, let's make an
+ infinite loop! *)
+ LR := CIA;
+
}