summaryrefslogtreecommitdiff
path: root/src/sail_lib.ml
diff options
context:
space:
mode:
authorJon French2018-07-11 18:13:15 +0100
committerJon French2018-07-11 18:16:56 +0100
commit2a89faec667fdf24b93360d3da5f14eab161983b (patch)
treed9f1fba3e03f0429a4b13b1ce6d597861d4375b2 /src/sail_lib.ml
parentae83a6c62fa0794215f78cd75c8020805f5d9c0a (diff)
RISC-V model fixes for RMEM
Diffstat (limited to 'src/sail_lib.ml')
-rw-r--r--src/sail_lib.ml2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/sail_lib.ml b/src/sail_lib.ml
index 63260c17..16b1d3cc 100644
--- a/src/sail_lib.ml
+++ b/src/sail_lib.ml
@@ -457,7 +457,7 @@ let write_ram' (data_size, addr, data) =
end
let write_ram (addr_size, data_size, hex_ram, addr, data) =
- write_ram' (data_size, uint addr, data)
+ write_ram' (data_size, uint addr, data); true
let wram addr byte =
let bytes = Bytes.make 1 (char_of_int byte) in