diff options
| author | Shaked Flur | 2018-12-22 15:40:32 +0000 |
|---|---|---|
| committer | Shaked Flur | 2018-12-22 15:40:32 +0000 |
| commit | 8dbe18b8976e30fa88814542ea913ddc4193cd8b (patch) | |
| tree | 98db232842e004dcf188b8d0aca2bcafb1bd5084 /src/lem_interp | |
| parent | d99dd3833e8ebf89c586cc5316582a3c62ad7997 (diff) | |
Added RISC-V fence.tso
Diffstat (limited to 'src/lem_interp')
| -rw-r--r-- | src/lem_interp/sail2_instr_kinds.lem | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/src/lem_interp/sail2_instr_kinds.lem b/src/lem_interp/sail2_instr_kinds.lem index 3d238676..eadc85bf 100644 --- a/src/lem_interp/sail2_instr_kinds.lem +++ b/src/lem_interp/sail2_instr_kinds.lem @@ -155,6 +155,7 @@ type barrier_kind = | Barrier_RISCV_rw_r | Barrier_RISCV_r_w | Barrier_RISCV_w_r + | Barrier_RISCV_tso | Barrier_RISCV_i (* X86 *) | Barrier_x86_MFENCE @@ -184,6 +185,7 @@ instance (Show barrier_kind) | Barrier_RISCV_rw_r -> "Barrier_RISCV_rw_r" | Barrier_RISCV_r_w -> "Barrier_RISCV_r_w" | Barrier_RISCV_w_r -> "Barrier_RISCV_w_r" + | Barrier_RISCV_tso -> "Barrier_RISCV_tso" | Barrier_RISCV_i -> "Barrier_RISCV_i" | Barrier_x86_MFENCE -> "Barrier_x86_MFENCE" end @@ -300,7 +302,8 @@ instance (EnumerationType barrier_kind) | Barrier_RISCV_rw_r -> 19 | Barrier_RISCV_r_w -> 20 | Barrier_RISCV_w_r -> 21 - | Barrier_RISCV_i -> 22 - | Barrier_x86_MFENCE -> 23 + | Barrier_RISCV_tso -> 22 + | Barrier_RISCV_i -> 23 + | Barrier_x86_MFENCE -> 24 end end |