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authorShaked Flur2017-08-22 14:16:01 +0100
committerShaked Flur2017-08-22 14:16:01 +0100
commit6cc248cc27d9133e23da1454f115176f0799a572 (patch)
tree2732726b66c4c376bee9baa606285e6900f50e9f /src/lem_interp/sail_impl_base.lem
parent78a35c575021679b5e512539598d47603a6822f0 (diff)
added RISC-V "fence w,w" and "fence.i";
fixed the interpreter nias analysis;
Diffstat (limited to 'src/lem_interp/sail_impl_base.lem')
-rw-r--r--src/lem_interp/sail_impl_base.lem4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/lem_interp/sail_impl_base.lem b/src/lem_interp/sail_impl_base.lem
index caec3838..ebf0db4a 100644
--- a/src/lem_interp/sail_impl_base.lem
+++ b/src/lem_interp/sail_impl_base.lem
@@ -479,6 +479,8 @@ type barrier_kind =
| Barrier_RISCV_rw_rw
| Barrier_RISCV_r_rw
| Barrier_RISCV_rw_w
+ | Barrier_RISCV_w_w
+ | Barrier_RISCV_i
instance (Show barrier_kind)
@@ -499,6 +501,8 @@ instance (Show barrier_kind)
| Barrier_RISCV_rw_rw -> "Barrier_RISCV_rw_rw"
| Barrier_RISCV_r_rw -> "Barrier_RISCV_r_rw"
| Barrier_RISCV_rw_w -> "Barrier_RISCV_rw_w"
+ | Barrier_RISCV_w_w -> "Barrier_RISCV_w_w"
+ | Barrier_RISCV_I -> "Barrier_RISCV_i"
end
end