diff options
| author | Kathy Gray | 2015-02-27 14:52:13 +0000 |
|---|---|---|
| committer | Kathy Gray | 2015-02-27 14:52:13 +0000 |
| commit | ef0b2daa613c81f2ea42168023fd70e6f6dee187 (patch) | |
| tree | acf2c3de90b088cbb1e9326e2d3011313bc906c4 /src/lem_interp/interp_interface.lem | |
| parent | ad0d6ce116355702467845f42a24f672fe2a141f (diff) | |
Fix a series of errors leading to the first ARM instruction not running.
Including:
Correct loss of constraints between declared constraints, pattern constraints and expression body constraints
Handle insertion of dependent parameters in the case of unit parameters
Add a case to how ifields are translated to permit numbers as well as bits and bitvectors
Expand interpreter to actually handle user-defined functions on the left had side of the assignment expression.
Diffstat (limited to 'src/lem_interp/interp_interface.lem')
| -rw-r--r-- | src/lem_interp/interp_interface.lem | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/lem_interp/interp_interface.lem b/src/lem_interp/interp_interface.lem index ae29a2e9..3b83dd89 100644 --- a/src/lem_interp/interp_interface.lem +++ b/src/lem_interp/interp_interface.lem @@ -349,12 +349,14 @@ val initial_instruction_state : context -> string -> list register_value -> inst (*Type representint the constructor parameters in instruction, other is a type not representable externally*) type instr_parm_typ = | Bit (*A single bit, represented as a one element Bitvector as a value*) + | Range of maybe int (*Internall represented as a number, externally as a bitvector of length int *) | Other (*An unrepresentable type, will be represented as Unknown in instruciton form *) | Bvector of maybe int (* A bitvector type, with length when statically known *) let instr_parm_typEqual ip1 ip2 = match (ip1,ip2) with | (Bit,Bit) -> true | (Other,Other) -> true + | (Range i1,Range i2) -> i1 = i2 | (Bvector i1,Bvector i2) -> i1 = i2 | _ -> false end |