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authorKathy Gray2014-08-18 18:43:14 +0100
committerKathy Gray2014-08-18 18:43:14 +0100
commit3c86cf03071bef70c1909b13dcb1db28f8cd5c33 (patch)
tree01d6230242279088bde252c6323e80193a1029c6 /src/lem_interp/interp_inter_imp.lem
parent9f2ec1fcb16191ad9c54f68152f03ca80f85522e (diff)
Handling many register reads, writes, and memory reads.
There are problems that warrant discussion about handling special registers that hold records or data structures previously.
Diffstat (limited to 'src/lem_interp/interp_inter_imp.lem')
-rw-r--r--src/lem_interp/interp_inter_imp.lem21
1 files changed, 15 insertions, 6 deletions
diff --git a/src/lem_interp/interp_inter_imp.lem b/src/lem_interp/interp_inter_imp.lem
index ba501577..908b008f 100644
--- a/src/lem_interp/interp_inter_imp.lem
+++ b/src/lem_interp/interp_inter_imp.lem
@@ -19,15 +19,17 @@ let to_bits l = (List.map (fun b -> match b with
let from_bits l = (List.map (fun b -> match b with
| Interp.V_lit (L_aux L_zero _) -> false
| _ -> true end) l)
-let rec to_bytes l = match l with
+let rec to_bytes l = match (List.reverse l) with
| [] -> []
| (a::b::c::d::e::f::g::h::rest) ->
- (natFromInteger(integerFromBoolList (true,[a;b;c;d;e;f;g;h])))::(to_bytes rest)
+ (natFromInteger(integerFromBoolList (false,[a;b;c;d;e;f;g;h])))::(to_bytes rest)
end
let intern_value v = match v with
| Bitvector bs -> Interp.V_vector 0 true (to_bits bs)
- | Bytevector bys -> Interp.V_vector 0 true (to_bits (List.concat (List.map (fun n -> boolListFrombitSeq 8 (bitSeqFromInteger (Just 8) (integerFromNat n))) bys)))
+ | Bytevector bys -> Interp.V_vector 0 true
+ (to_bits (List.reverse
+ (List.concat (List.map (fun n -> boolListFrombitSeq 8 (bitSeqFromInteger (Just 8) (integerFromNat n))) bys))))
| Unknown -> Interp.V_unknown
end
@@ -40,11 +42,11 @@ end
let extern_value mode for_mem v = match v with
| Interp.V_vector _ true bits ->
if for_mem
- then (Bytevector (to_bytes (from_bits bits)), Nothing)
+ then (Bytevector (List.reverse (to_bytes (from_bits bits))), Nothing)
else (Bitvector (from_bits bits), Nothing)
| Interp.V_track (Interp.V_vector _ true bits) regs ->
if for_mem
- then (Bytevector (to_bytes (from_bits bits)),
+ then (Bytevector (List.reverse (to_bytes (from_bits bits))),
if (mode.Interp.track_values)
then (Just (List.map (fun r -> extern_reg r Nothing) regs))
else Nothing)
@@ -72,13 +74,20 @@ type mem_function = (string *
Should probably be expanded into a parameter to mode as with above
*)
let memory_functions =
- [ ("MEM", (Just(Read_plain), Just(Write_plain),
+ [ ("MEMr", (Just(Read_plain), Nothing,
(fun mode v -> match v with
| Interp.V_tuple [location;length] ->
match length with
| Interp.V_lit (L_aux (L_num len) _) ->
let (v,regs) = extern_value mode true location in
(v,len,regs) end end)));
+ ("MEMw", (Nothing, Just(Write_plain),
+ (fun mode v -> match v with
+ | Interp.V_tuple [location;length] ->
+ match length with
+ | Interp.V_lit (L_aux (L_num len) _) ->
+ let (v,regs) = extern_value mode true location in
+ (v,len,regs) end end)));
]
let rec interp_to_outcome mode thunk =