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| author | Thomas Bauereiss | 2017-11-07 15:39:44 +0000 |
|---|---|---|
| committer | Thomas Bauereiss | 2017-11-07 15:39:44 +0000 |
| commit | a06fef246172dd97d68e4fef77132a375554db73 (patch) | |
| tree | 4f9574e9c9e46c9d7b6ecec349b84943b1ace2d6 /src/gen_lib | |
| parent | 1dbf01cafae9aba80582754f17d831c8bc11cdba (diff) | |
Add builtin for reversing endianness
Diffstat (limited to 'src/gen_lib')
| -rw-r--r-- | src/gen_lib/sail_values.lem | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/gen_lib/sail_values.lem b/src/gen_lib/sail_values.lem index 96886199..bd18cf81 100644 --- a/src/gen_lib/sail_values.lem +++ b/src/gen_lib/sail_values.lem @@ -450,6 +450,12 @@ let address_of_bitv v = let bytes = bytes_of_bitv v in address_of_byte_list bytes +let rec reverse_endianness_bl bits = + if List.length bits <= 8 then bits else + list_append(reverse_endianness_bl(list_drop(8, bits)), list_take(8, bits)) + +val reverse_endianness : forall 'a. Bitvector 'a => 'a -> 'a +let reverse_endianness v = of_bits (reverse_endianness_bl (bits_of v)) (*** Registers *) |
