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| author | Christopher | 2015-12-16 14:52:03 +0000 |
|---|---|---|
| committer | Christopher | 2015-12-16 14:52:03 +0000 |
| commit | 1ecce0a8d654b995f386d088143d0727e699f61b (patch) | |
| tree | db67fa1ca640cdc1be0d5ce4f86b1184d634f4c4 /src/gen_lib/sail_values.lem | |
| parent | 989c24434b6c40c18a6532f2f0724b2a22f37893 (diff) | |
rewriter and pp changes for generating ARM output
Diffstat (limited to 'src/gen_lib/sail_values.lem')
| -rw-r--r-- | src/gen_lib/sail_values.lem | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/gen_lib/sail_values.lem b/src/gen_lib/sail_values.lem index 2681d334..d2364397 100644 --- a/src/gen_lib/sail_values.lem +++ b/src/gen_lib/sail_values.lem @@ -466,3 +466,7 @@ let make_bitvector_undef length = let bitwise_not_range_bit n = bitwise_not (to_vec defaultDir n) + +let mask (n,V bits start dir) = + let current_size = List.length bits in + V (drop (current_size - (natFromInteger n)) bits) (if dir then 0 else (n-1)) dir |