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authorThomas Bauereiss2018-06-25 19:40:43 +0100
committerThomas Bauereiss2018-06-25 19:46:46 +0100
commit90f4906af7b4369d6759e5edbbf8a3aaac4d77e6 (patch)
treeef4a563d69f24ee4889396ea93062e553f9f84dd /src/gen_lib/sail2_string.lem
parent72c9ec218e77f6a1bbe85e9617b1f1757b0a9c32 (diff)
Support bitlist representation in Sail2_string
Diffstat (limited to 'src/gen_lib/sail2_string.lem')
-rw-r--r--src/gen_lib/sail2_string.lem5
1 files changed, 1 insertions, 4 deletions
diff --git a/src/gen_lib/sail2_string.lem b/src/gen_lib/sail2_string.lem
index 3374d800..d0e40ad4 100644
--- a/src/gen_lib/sail2_string.lem
+++ b/src/gen_lib/sail2_string.lem
@@ -4,7 +4,7 @@ open import List_extra
open import String
open import String_extra
-open import Sail2_operators_mwords
+open import Sail2_operators
open import Sail2_values
val string_sub : string -> ii -> ii -> string
@@ -162,6 +162,3 @@ let hex_bits_32_matches_prefix s =
else
Nothing
end
-
-
-let string_of_bits = string_of_vec