Support vector registers (other than bitvectors)

1 files changed, 2 insertions, 0 deletions

diff --git a/src/gen_lib/prompt.lem b/src/gen_lib/prompt.lem
index 0de76624..f5ac8fc5 100644
--- a/src/gen_lib/prompt.lem
+++ b/src/gen_lib/prompt.lem
@@ -133,6 +133,7 @@ let write_reg_range reg i j v =
 let write_reg_pos reg i v =
   let iN = natFromInteger i in
   write_reg_aux (external_reg_slice reg (iN,iN)) [v]
+let write_reg_bit = write_reg_pos
 let write_reg_field reg regfield v =
   write_reg_aux (external_reg_field_whole reg regfield.field_name) v
 (*let write_reg_field_bit reg regfield bit =
@@ -142,6 +143,7 @@ let write_reg_field_range reg regfield i j v =
   write_reg_aux (external_reg_field_slice reg regfield.field_name (natFromInteger i,natFromInteger j)) v
 let write_reg_field_pos reg regfield i v =
   write_reg_field_range reg regfield i i [v]
+let write_reg_field_bit = write_reg_field_pos