Update Lem shallow embedding to Sail2

- Remove vector start indices
- Library refactoring:  Definitions in sail_operators.lem now use Bitvector
  type class and work for both bit list and machine word representations
- Add Lem bindings to AArch64 and RISC-V preludes

TODO: Merge specialised machine word operations from sail_operators_mwords into
sail_operators.

1 files changed, 3 insertions, 3 deletions

diff --git a/src/gen_lib/prompt.lem b/src/gen_lib/prompt.lem
index 744b6f7f..5019c2f7 100644
--- a/src/gen_lib/prompt.lem
+++ b/src/gen_lib/prompt.lem
@@ -86,12 +86,12 @@ let try_catchR m h =
      end)
 
 
-val read_mem : forall 'a 'b 'e. Bitvector 'a, Bitvector 'b => bool -> read_kind -> 'a -> integer -> M 'b 'e
-let read_mem dir rk addr sz =
+val read_mem : forall 'a 'b 'e. Bitvector 'a, Bitvector 'b => read_kind -> 'a -> integer -> M 'b 'e
+let read_mem rk addr sz =
   let addr = address_lifted_of_bitv (bits_of addr) in
   let sz = natFromInteger sz in
   let k memory_value =
-    let bitv = of_bits (internal_mem_value dir memory_value) in
+    let bitv = of_bits (internal_mem_value memory_value) in
     (Done bitv,Nothing) in
   Read_mem (rk,addr,sz) k