diff options
| author | Brian Campbell | 2018-11-14 15:56:26 +0000 |
|---|---|---|
| committer | Brian Campbell | 2018-11-14 15:56:26 +0000 |
| commit | f8ae5b7c8abe1cc077d928a1748b13d5ec8c41ed (patch) | |
| tree | b5b8ed7b8982a411d6ed0f508e60e4a24c8cc96e /riscv | |
| parent | 021884e51f1a21455d01ee62dec9aa83acd8ba54 (diff) | |
Fix memory map in RVFI-DII mode
Diffstat (limited to 'riscv')
| -rw-r--r-- | riscv/riscv_sim.c | 14 |
1 files changed, 9 insertions, 5 deletions
diff --git a/riscv/riscv_sim.c b/riscv/riscv_sim.c index 1d338880..3a4b66eb 100644 --- a/riscv/riscv_sim.c +++ b/riscv/riscv_sim.c @@ -303,11 +303,6 @@ void init_sail_reset_vector(uint64_t entry) /* set rom size */ rv_rom_size = rom_end - rv_rom_base; -#ifdef RVFI_DII - if (rvfi_dii) - zPC = entry; - else -#endif /* boot at reset vector */ zPC = rv_rom_base; } @@ -317,6 +312,15 @@ void init_sail(uint64_t elf_entry) model_init(); zinit_platform(UNIT); zinit_sys(UNIT); +#ifdef RVFI_DII + if (rvfi_dii) { + rv_ram_base = UINT64_C(0x80000000); + rv_ram_size = UINT64_C(0x10000); + rv_rom_base = UINT64_C(0); + rv_rom_size = UINT64_C(0); + zPC = elf_entry; + } else +#endif init_sail_reset_vector(elf_entry); } |
