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authorPrashanth Mundkur2018-11-29 09:18:31 -0800
committerPrashanth Mundkur2018-11-29 09:18:47 -0800
commiteedd493fb5a647a99367b12609b0e00814457f90 (patch)
tree618b7b274f19db67825aa7d16db746d1e384f579 /riscv
parentf33c5d3d237449a58322fe3299b21788707a2555 (diff)
RISC-V: properly set mstatus.FS in absence of floating-point support.
Diffstat (limited to 'riscv')
-rw-r--r--riscv/riscv_sys.sail5
1 files changed, 5 insertions, 0 deletions
diff --git a/riscv/riscv_sys.sail b/riscv/riscv_sys.sail
index 81871f91..d29a7690 100644
--- a/riscv/riscv_sys.sail
+++ b/riscv/riscv_sys.sail
@@ -110,13 +110,18 @@ register mstatus : Mstatus
function legalize_mstatus(o : Mstatus, v : xlenbits) -> Mstatus = {
let m : Mstatus = Mk_Mstatus(v);
+
/* We don't have any extension context yet. */
let m = update_XS(m, extStatus_to_bits(Off));
+ let m = update_FS(m, extStatus_to_bits(Off));
+
let m = update_SD(m, extStatus_of_bits(m.FS()) == Dirty
| extStatus_of_bits(m.XS()) == Dirty);
+
/* For now, we don't allow SXL and UXL to be changed, for Spike compatibility. */
let m = update_SXL(m, o.SXL());
let m = update_UXL(m, o.UXL());
+
/* Hardwired to zero in the absence of 'N'. */
let m = update_UPIE(m, false);
let m = update_UIE(m, false);