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authorPrashanth Mundkur2018-02-01 04:57:52 -0800
committerPrashanth Mundkur2018-02-01 10:07:37 -0800
commitc815ede7a5a311f85b05b9b597fd23765c7b0156 (patch)
tree780f71ed8be7aa8b56c84be54f25891d21fe9bcb /riscv
parenta2d505a0e7e01efbfd24cacc6ea0f74918ba31f8 (diff)
badaddr is a misleading name, since it could contain what the PC points to for illegal-instruction exceptions. changed to excinfo.
Diffstat (limited to 'riscv')
-rw-r--r--riscv/main.sail2
-rw-r--r--riscv/riscv.sail6
-rw-r--r--riscv/riscv_sys.sail22
3 files changed, 15 insertions, 15 deletions
diff --git a/riscv/main.sail b/riscv/main.sail
index ce749d94..4209b7d1 100644
--- a/riscv/main.sail
+++ b/riscv/main.sail
@@ -21,7 +21,7 @@ function fetch_and_execute () =
if (misa.C() == 0b0 & (instr_sz == 2)) then {
let t : sync_exception =
struct { trap = Illegal_Instr,
- badaddr = Some (EXTZ(instr)) } in
+ excinfo = Some (EXTZ(instr)) } in
nextPC = handle_exception_ctl(cur_privilege, CTL_TRAP(t), PC)
} else {
nextPC = PC + instr_sz;
diff --git a/riscv/riscv.sail b/riscv/riscv.sail
index e8c1a2ea..b730a347 100644
--- a/riscv/riscv.sail
+++ b/riscv/riscv.sail
@@ -286,7 +286,7 @@ function clause execute ECALL =
USER => User_ECall,
MACHINE => Machine_ECall
},
- badaddr = (None : option(regval)) } in
+ excinfo = (None : option(regval)) } in
nextPC = handle_exception_ctl(cur_privilege, CTL_TRAP(t), PC)
/* ****************************************************************** */
@@ -490,7 +490,7 @@ function clause execute CSR(csr, rs1, rd, is_imm, op) =
let instr : regval = EXTZ(__RISCV_read(PC, 4));
let t : sync_exception =
struct { trap = Illegal_Instr,
- badaddr = Some (instr) } in
+ excinfo = Some (instr) } in
nextPC = handle_exception_ctl(cur_privilege, CTL_TRAP(t), PC)
} else {
let csr_val = readCSR(csr); /* could have side-effects, so technically shouldn't perform for CSRW[I] with rd == 0 */
@@ -526,7 +526,7 @@ function clause decodeCompressed (0b0000 @ 0b00000 @ 0b00000 @ 0b00) : bits(16)
function clause execute (ILLEGAL) = {
let t : sync_exception =
struct { trap = Illegal_Instr,
- badaddr = Some (EXTZ(0b0)) } in
+ excinfo = Some (EXTZ(0b0)) } in
nextPC = handle_exception_ctl(cur_privilege, CTL_TRAP(t), PC)
}
diff --git a/riscv/riscv_sys.sail b/riscv/riscv_sys.sail
index bd37b297..99de174c 100644
--- a/riscv/riscv_sys.sail
+++ b/riscv/riscv_sys.sail
@@ -212,7 +212,7 @@ register mhartid : regval
struct sync_exception = {
trap : ExceptionCode,
- badaddr : option(regval)
+ excinfo : option(regval)
}
union ctl_result = {
@@ -260,19 +260,19 @@ function handle_exception_ctl(cur_priv : privilege, ctl : ctl_result,
match (e.trap) {
Misaligned_Fetch => {
- match (e.badaddr) {
+ match (e.excinfo) {
Some(a) => mtval = a,
None => throw(Error_internal_error)
}
},
Fetch_Access => {
- match (e.badaddr) {
+ match (e.excinfo) {
Some(a) => mtval = a,
None => throw(Error_internal_error)
}
},
Illegal_Instr => {
- match (e.badaddr) {
+ match (e.excinfo) {
Some(a) => mtval = a,
None => throw(Error_internal_error)
}
@@ -281,25 +281,25 @@ function handle_exception_ctl(cur_priv : privilege, ctl : ctl_result,
Breakpoint => not_implemented("breakpoint"),
Misaligned_Load => {
- match (e.badaddr) {
+ match (e.excinfo) {
Some(a) => mtval = a,
None => throw(Error_internal_error)
}
},
Load_Access => {
- match (e.badaddr) {
+ match (e.excinfo) {
Some(a) => mtval = a,
None => throw(Error_internal_error)
}
},
Misaligned_Store => {
- match (e.badaddr) {
+ match (e.excinfo) {
Some(a) => mtval = a,
None => throw(Error_internal_error)
}
},
Store_Access => {
- match (e.badaddr) {
+ match (e.excinfo) {
Some(a) => mtval = a,
None => throw(Error_internal_error)
}
@@ -316,19 +316,19 @@ function handle_exception_ctl(cur_priv : privilege, ctl : ctl_result,
},
Fetch_PageFault => {
- match (e.badaddr) {
+ match (e.excinfo) {
Some(a) => mtval = a,
None => throw(Error_internal_error)
}
},
Load_PageFault => {
- match (e.badaddr) {
+ match (e.excinfo) {
Some(a) => mtval = a,
None => throw(Error_internal_error)
}
},
Store_PageFault => {
- match (e.badaddr) {
+ match (e.excinfo) {
Some(a) => mtval = a,
None => throw(Error_internal_error)
}