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authorThomas Bauereiss2018-06-25 19:40:43 +0100
committerThomas Bauereiss2018-06-25 19:46:46 +0100
commit90f4906af7b4369d6759e5edbbf8a3aaac4d77e6 (patch)
treeef4a563d69f24ee4889396ea93062e553f9f84dd /riscv
parent72c9ec218e77f6a1bbe85e9617b1f1757b0a9c32 (diff)
Support bitlist representation in Sail2_string
Diffstat (limited to 'riscv')
-rw-r--r--riscv/prelude.sail2
1 files changed, 1 insertions, 1 deletions
diff --git a/riscv/prelude.sail b/riscv/prelude.sail
index d10dddc9..412dcfc7 100644
--- a/riscv/prelude.sail
+++ b/riscv/prelude.sail
@@ -229,7 +229,7 @@ val DecStr : int -> string
val HexStr : int -> string
-val BitStr = {ocaml: "string_of_bits", lem: "string_of_vec"} : forall 'n. bits('n) -> string
+val BitStr = "string_of_bits" : forall 'n. bits('n) -> string
val xor_vec = "xor_vec" : forall 'n. (bits('n), bits('n)) -> bits('n)