summaryrefslogtreecommitdiff
path: root/riscv
diff options
context:
space:
mode:
authorPrashanth Mundkur2018-06-08 15:16:30 -0700
committerPrashanth Mundkur2018-06-08 15:16:44 -0700
commit3d3fb21df7c41cb0d68954775a29893655f09fa2 (patch)
treed95daaaf548afac78c35955ac3d614cbf9c4045e /riscv
parent4d0eee64305705239b40c7b3328d45180a60f964 (diff)
Update initialization of misa.
Diffstat (limited to 'riscv')
-rw-r--r--riscv/riscv_sys.sail9
1 files changed, 6 insertions, 3 deletions
diff --git a/riscv/riscv_sys.sail b/riscv/riscv_sys.sail
index 01e45363..0d1b69d9 100644
--- a/riscv/riscv_sys.sail
+++ b/riscv/riscv_sys.sail
@@ -727,9 +727,12 @@ function init_sys() -> unit = {
cur_privilege = Machine;
misa->MXL() = arch_to_bits(RV64);
- misa->C() = true;
- misa->U() = true;
- misa->S() = true;
+ misa->A() = true; /* atomics */
+ misa->C() = true; /* RVC */
+ misa->I() = true; /* base integer ISA */
+ misa->M() = true; /* integer multiply/divide */
+ misa->U() = true; /* user-mode */
+ misa->S() = true; /* supervisor-mode */
mstatus->SXL() = misa.MXL();
mstatus->UXL() = misa.MXL();