diff options
| author | Jon French | 2018-06-08 16:35:31 +0100 |
|---|---|---|
| committer | Jon French | 2018-06-08 16:41:55 +0100 |
| commit | 08227192a8068ac34b618cc218982e02b353127e (patch) | |
| tree | 4fcd7b3a5f2376de09db037f08ede7ca561f8749 /riscv | |
| parent | fd706bc10a21577861d1c909ceeeed523d43dc63 (diff) | |
type checking mappings: allow inferring based on the other side's id inferences
Diffstat (limited to 'riscv')
| -rw-r--r-- | riscv/riscv.sail | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/riscv/riscv.sail b/riscv/riscv.sail index 38c0a61e..be629c5c 100644 --- a/riscv/riscv.sail +++ b/riscv/riscv.sail @@ -51,7 +51,7 @@ mapping clause assembly = UTYPE(imm, rd, op) <-> utype_mnemonic(op) ^^ spc() ^^ /* ****************************************************************** */ union clause ast = RISCV_JAL : (bits(21), regbits) -mapping clause encdec = RISCV_JAL(imm_19 : bits(1) @ imm_7_0 : bits(8) @ imm_8 : bits(1) @ imm_18_13 : bits(6) @ imm_12_9 : bits(4) @ 0b0, rd) +mapping clause encdec = RISCV_JAL(imm_19 @ imm_7_0 @ imm_8 @ imm_18_13 @ imm_12_9 @ 0b0, rd) <-> imm_19 : bits(1) @ imm_18_13 : bits(6) @ imm_12_9 : bits(4) @ imm_8 : bits(1) @ imm_7_0 : bits(8) @ rd : regbits @ 0b1101111 function clause execute (RISCV_JAL(imm, rd)) = { @@ -414,7 +414,7 @@ mapping clause assembly = STORE(imm, rs1, rd, size, aq, rl) <-> "s" ^^ size_mnem /* ****************************************************************** */ union clause ast = ADDIW : (bits(12), regbits, regbits) -mapping clause encdec = ADDIW(imm, rs1, rd) <-> imm : bits(12) @ rs1 : regbits @ 0b000 @ rd : regbits @ 0b0011011 +mapping clause encdec = ADDIW(imm, rs1, rd) <-> imm @ rs1 : regbits @ 0b000 @ rd : regbits @ 0b0011011 function clause execute (ADDIW(imm, rs1, rd)) = let result : xlenbits = EXTS(imm) + X(rs1) in |