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authorJon French2018-05-10 11:32:15 +0100
committerJon French2018-05-10 11:32:51 +0100
commit00c946d24c7f3f1cd9d5f6ef4798b72a2f7c3c16 (patch)
treebdf212b27d4f4731d3cd987d9f4e6204e8470f35 /riscv
parent43a6832d12fab718b502d82545301d7e766745c5 (diff)
riscv/Makefile: add SAIL variable for easier debugging
Diffstat (limited to 'riscv')
-rw-r--r--riscv/Makefile11
1 files changed, 6 insertions, 5 deletions
diff --git a/riscv/Makefile b/riscv/Makefile
index dc7a238d..27d9e4b1 100644
--- a/riscv/Makefile
+++ b/riscv/Makefile
@@ -1,21 +1,22 @@
SAIL_SRCS = prelude.sail riscv_types.sail riscv_mem.sail riscv_sys.sail riscv_vmem.sail riscv.sail
SAIL_DIR ?= $(realpath ..)
+SAIL ?= $(SAIL_DIR)/sail
export SAIL_DIR
all: riscv Riscv.thy
check: $(SAIL_SRCS) main.sail Makefile
- $(SAIL_DIR)/sail $(SAIL_FLAGS) $(SAIL_SRCS) main.sail
+ $(SAIL) $(SAIL_FLAGS) $(SAIL_SRCS) main.sail
riscv: $(SAIL_SRCS) main.sail Makefile
- $(SAIL_DIR)/sail $(SAIL_FLAGS) -ocaml -o riscv $(SAIL_SRCS) main.sail
+ $(SAIL) $(SAIL_FLAGS) -ocaml -o riscv $(SAIL_SRCS) main.sail
riscv_duopod_ocaml: prelude.sail riscv_duopod.sail
- $(SAIL_DIR)/sail $(SAIL_FLAGS) -ocaml -o $@ $^
+ $(SAIL) $(SAIL_FLAGS) -ocaml -o $@ $^
riscv_duopod.lem: prelude.sail riscv_duopod.sail
- $(SAIL_DIR)/sail $(SAIL_FLAGS) -lem -lem_mwords -lem_lib Riscv_extras -o riscv_duopod $^
+ $(SAIL) $(SAIL_FLAGS) -lem -lem_mwords -lem_lib Riscv_extras -o riscv_duopod $^
Riscv_duopod.thy: riscv_duopod.lem riscv_extras.lem
lem -isa -outdir . -lib ../src/lem_interp -lib ../src/gen_lib \
riscv_extras.lem \
@@ -32,7 +33,7 @@ Riscv.thy: riscv.lem riscv_extras.lem
sed -i 's/datatype ast/datatype (plugins only: size) ast/' Riscv_types.thy
riscv.lem: $(SAIL_SRCS) Makefile
- $(SAIL_DIR)/sail $(SAIL_FLAGS) -lem -o riscv -lem_mwords -lem_lib Riscv_extras $(SAIL_SRCS)
+ $(SAIL) $(SAIL_FLAGS) -lem -o riscv -lem_mwords -lem_lib Riscv_extras $(SAIL_SRCS)
clean:
-rm -rf riscv _sbuild