diff options
| author | Alasdair Armstrong | 2018-09-06 17:17:23 +0100 |
|---|---|---|
| committer | Alasdair Armstrong | 2018-09-06 17:17:23 +0100 |
| commit | eae01f8c348235ea552c67ce323a1ada3dbc8b08 (patch) | |
| tree | 93248a495e8fb4ce44fc1f00f0722fe3736a3d17 /riscv/riscv_platform.c | |
| parent | b04f8c9dfa599b48544bac024eaa78e6b93c29d4 (diff) | |
RISCV: Get enough of the RISCV platform into C to run some tests
Diffstat (limited to 'riscv/riscv_platform.c')
| -rw-r--r-- | riscv/riscv_platform.c | 34 |
1 files changed, 26 insertions, 8 deletions
diff --git a/riscv/riscv_platform.c b/riscv/riscv_platform.c index d21824a3..6330ae4d 100644 --- a/riscv/riscv_platform.c +++ b/riscv/riscv_platform.c @@ -9,25 +9,41 @@ bool plat_enable_misaligned_access(unit u) { return false; } mach_bits plat_ram_base(unit u) -{ return 0; } +{ + return UINT64_C(0x80000000); +} mach_bits plat_ram_size(unit u) -{ return 0; } +{ + return UINT64_C(0x80000000); +} mach_bits plat_rom_base(unit u) -{ return 0; } +{ + return UINT64_C(0x1000); +} mach_bits plat_rom_size(unit u) -{ return 0; } +{ + return UINT64_C(0x100); +} mach_bits plat_clint_base(unit u) -{ return 0; } +{ + return UINT64_C(0x2000000); +} mach_bits plat_clint_size(unit u) -{ return 0; } +{ + return UINT64_C(0xc0000); +} bool within_phys_mem(mach_bits addr, sail_int len) -{ return 0; } +{ + printf("within_phys_mem\n"); + exit(EXIT_FAILURE); + return 0; +} unit load_reservation(mach_bits addr) { return UNIT; } @@ -45,7 +61,9 @@ void plat_insns_per_tick(sail_int *rop, unit u) { } mach_bits plat_htif_tohost(unit u) -{ return 0; } +{ + return UINT64_C(0x2000000); +} unit memea(mach_bits len, sail_int n) { |
