diff options
| author | Prashanth Mundkur | 2018-09-20 18:09:14 -0700 |
|---|---|---|
| committer | Prashanth Mundkur | 2018-10-23 15:32:15 -0700 |
| commit | 92bcc59480b1c70827bad89217cdde6511429632 (patch) | |
| tree | 5ed6316a548e4d14cbecd26d31791f0e9f6fa1d0 /riscv/riscv_platform.c | |
| parent | 44919f6064e2031014918f786993677696e86629 (diff) | |
RISC-V: set htif tohost port address using ELF symbol.
Diffstat (limited to 'riscv/riscv_platform.c')
| -rw-r--r-- | riscv/riscv_platform.c | 37 |
1 files changed, 6 insertions, 31 deletions
diff --git a/riscv/riscv_platform.c b/riscv/riscv_platform.c index a16f7c88..758bf46f 100644 --- a/riscv/riscv_platform.c +++ b/riscv/riscv_platform.c @@ -12,47 +12,22 @@ bool plat_enable_misaligned_access(unit u) { return rv_enable_misaligned; } mach_bits plat_ram_base(unit u) -{ - fprintf(stderr, "plat_ram_base: -> %0" PRIx64 "\n", rv_ram_base); - return rv_ram_base; -} +{ return rv_ram_base; } mach_bits plat_ram_size(unit u) -{ - fprintf(stderr, "plat_ram_size: -> %0" PRIx64 "\n", rv_ram_size); - return rv_ram_size; -} +{ return rv_ram_size; } mach_bits plat_rom_base(unit u) -{ - fprintf(stderr, "plat_rom_base: -> %0" PRIx64 "\n", rv_rom_base); - return rv_rom_base; -} +{ return rv_rom_base; } mach_bits plat_rom_size(unit u) -{ - fprintf(stderr, "plat_rom_size: -> %0" PRIx64 "\n", rv_rom_size); - return rv_rom_size; -} +{ return rv_rom_size; } mach_bits plat_clint_base(unit u) -{ - fprintf(stderr, "plat_clint_base: -> %0" PRIx64 "\n", rv_clint_base); - return rv_clint_base; -} +{ return rv_clint_base; } mach_bits plat_clint_size(unit u) -{ - fprintf(stderr, "plat_clint_size: -> %0" PRIx64 "\n", rv_clint_size); - return rv_clint_size; -} - -bool within_phys_mem(mach_bits addr, sail_int len) -{ - printf("within_phys_mem\n"); - exit(EXIT_FAILURE); - return 0; -} +{ return rv_clint_size; } unit load_reservation(mach_bits addr) { return UNIT; } |
