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authorPrashanth Mundkur2018-09-10 12:16:42 -0700
committerPrashanth Mundkur2018-10-23 15:32:15 -0700
commit2cef8d0c31a09ea4fac9a48faff882dde4e98641 (patch)
treea69ee2f3f27742cb971fadad6b29feb0700835ad /riscv/riscv_platform.c
parente489f2d37efa4c320004d35c3025c77e0a0c60d0 (diff)
RISC-V: Refactor c platform bits.
Diffstat (limited to 'riscv/riscv_platform.c')
-rw-r--r--riscv/riscv_platform.c21
1 files changed, 12 insertions, 9 deletions
diff --git a/riscv/riscv_platform.c b/riscv/riscv_platform.c
index 7f6ec470..31ec09c4 100644
--- a/riscv/riscv_platform.c
+++ b/riscv/riscv_platform.c
@@ -1,41 +1,44 @@
#include "sail.h"
#include "rts.h"
#include "riscv_prelude.h"
+#include "riscv_platform_impl.h"
+
+/* This file contains the definitions of the C externs of Sail model. */
bool plat_enable_dirty_update(unit u)
-{ return false; }
+{ return rv_enable_dirty_update; }
bool plat_enable_misaligned_access(unit u)
-{ return false; }
+{ return rv_enable_misaligned; }
mach_bits plat_ram_base(unit u)
{
- return UINT64_C(0x80000000);
+ return rv_ram_base;
}
mach_bits plat_ram_size(unit u)
{
- return UINT64_C(0x80000000);
+ return rv_rom_base;
}
mach_bits plat_rom_base(unit u)
{
- return UINT64_C(0x1000);
+ return rv_rom_base;
}
mach_bits plat_rom_size(unit u)
{
- return UINT64_C(0x100);
+ return rv_rom_size;
}
mach_bits plat_clint_base(unit u)
{
- return UINT64_C(0x2000000);
+ return rv_clint_base;
}
mach_bits plat_clint_size(unit u)
{
- return UINT64_C(0xc0000);
+ return rv_clint_size;
}
bool within_phys_mem(mach_bits addr, sail_int len)
@@ -62,7 +65,7 @@ void plat_insns_per_tick(sail_int *rop, unit u)
mach_bits plat_htif_tohost(unit u)
{
- return UINT64_C(0x80001000);
+ return rv_htif_tohost;
}
unit memea(mach_bits len, sail_int n)