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| author | Prashanth Mundkur | 2018-07-03 14:47:59 -0700 |
|---|---|---|
| committer | Prashanth Mundkur | 2018-07-03 14:48:04 -0700 |
| commit | edc516ff87fa45fd812dd5d7025d5d94c44a80ee (patch) | |
| tree | b58d6365aa1ebd00116e8aa7e30d94b85dc2d485 /riscv/platform_impl.ml | |
| parent | 53959905b8e4bfd4877c1e052195391d89bdb0d6 (diff) | |
Allow the riscv htif_tohost mmio port to be readable, and ack writes to that port.
Diffstat (limited to 'riscv/platform_impl.ml')
| -rw-r--r-- | riscv/platform_impl.ml | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/riscv/platform_impl.ml b/riscv/platform_impl.ml index aab272f8..5c238a1e 100644 --- a/riscv/platform_impl.ml +++ b/riscv/platform_impl.ml @@ -107,7 +107,7 @@ let cpu_hz = 1000000000;; let insns_per_tick = 100;; let mems = [ { addr = dram_base; - size = dram_size } ];; + size = dram_size } ];; let dts = spike_dts "rv64imac" cpu_hz insns_per_tick mems;; let bytes_to_string bytes = |