diff options
| author | Prashanth Mundkur | 2018-09-10 18:51:19 -0700 |
|---|---|---|
| committer | Prashanth Mundkur | 2018-10-23 15:32:15 -0700 |
| commit | a6842cd2393827a3d3263079313c988b2ce116df (patch) | |
| tree | 961eeaca98c8948e3da28f103631468266422da7 /riscv/Makefile | |
| parent | 03779a58bcf5fa0c413ae28d218faf7630aa056a (diff) | |
RISC-V: An initial C Sail model linked against Spike for testing.
Diffstat (limited to 'riscv/Makefile')
| -rw-r--r-- | riscv/Makefile | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/riscv/Makefile b/riscv/Makefile index 5b615971..88c46823 100644 --- a/riscv/Makefile +++ b/riscv/Makefile @@ -7,6 +7,12 @@ C_WARNINGS ?= C_INCS = riscv_prelude.h riscv_platform_impl.h riscv_platform.h C_SRCS = riscv_prelude.c riscv_platform_impl.c riscv_platform.c +TV_SPIKE_DIR = /home/mundkur/src/hw/l3/l3riscv +C_FLAGS = -I $(TV_SPIKE_DIR)/src/cpp -I ../lib +C_LIBS = -L $(TV_SPIKE_DIR) -ltv_spike -Wl,-rpath=$(TV_SPIKE_DIR) +C_LIBS += -L $(RISCV)/lib -lfesvr -lriscv -Wl,-rpath=$(RISCV)/lib +C_LIBS += -lgmp -lz + export SAIL_DIR all: platform Riscv.thy @@ -42,6 +48,12 @@ riscv.c: $(SAIL_SRCS) main.sail Makefile riscv_c: riscv.c $(C_INCS) $(C_SRCS) Makefile gcc $(C_WARNINGS) -O2 riscv.c $(C_SRCS) ../lib/*.c -lgmp -lz -I ../lib -o riscv_c +riscv_model.c: $(SAIL_SRCS) main.sail Makefile + $(SAIL) -O -memo_z3 -c -c_include riscv_prelude.h -c_include riscv_platform.h -c_no_main $(SAIL_SRCS) main.sail 1> $@ + +riscv_sim: riscv_model.c riscv_sim.c $(C_INCS) $(C_SRCS) $(CPP_SRCS) Makefile + gcc -g $(C_WARNINGS) $(C_FLAGS) -O2 riscv_model.c riscv_sim.c $(C_SRCS) ../lib/*.c $(C_LIBS) -o $@ + latex: $(SAIL_SRCS) Makefile $(SAIL) -latex -latex_prefix sail -o sail_ltx $(SAIL_SRCS) |