summaryrefslogtreecommitdiff
path: root/risc-v
diff options
context:
space:
mode:
authorShaked Flur2017-11-07 11:45:06 +0000
committerShaked Flur2017-11-07 11:45:06 +0000
commit6b86efcb6e1042d4933b67eaf3a7b3eff1fac256 (patch)
treea1d335d64b81e313463602791f65a6bac7a72738 /risc-v
parent5d59b0c1a477c2d9e1abcfc6fb1b51dff32bd9b5 (diff)
RISC-V parser checks
Diffstat (limited to 'risc-v')
-rw-r--r--risc-v/hgen/lexer.hgen4
-rw-r--r--risc-v/hgen/parser.hgen57
-rw-r--r--risc-v/hgen/token_types.hgen4
-rw-r--r--risc-v/hgen/tokens.hgen3
4 files changed, 49 insertions, 19 deletions
diff --git a/risc-v/hgen/lexer.hgen b/risc-v/hgen/lexer.hgen
index 27df99f4..e42b8a62 100644
--- a/risc-v/hgen/lexer.hgen
+++ b/risc-v/hgen/lexer.hgen
@@ -184,3 +184,7 @@
"amomin.d.aq.rl", AMO {width=RISCVDOUBLE; aq=true; rl=true; op=RISCVAMOMIN};
"amomaxu.d.aq.rl", AMO {width=RISCVDOUBLE; aq=true; rl=true; op=RISCVAMOMAXU};
"amominu.d.aq.rl", AMO {width=RISCVDOUBLE; aq=true; rl=true; op=RISCVAMOMINU};
+
+(** pseudo instructions *********************************************)
+
+"li", LI ()
diff --git a/risc-v/hgen/parser.hgen b/risc-v/hgen/parser.hgen
index cf0ca80b..210e38fb 100644
--- a/risc-v/hgen/parser.hgen
+++ b/risc-v/hgen/parser.hgen
@@ -1,25 +1,41 @@
| UTYPE reg COMMA NUM
- { `RISCVUTYPE($4, $2, $1.op) }
+ { (* it's not clear if NUM here should be before or after filling the
+ lowest 12 bits with zeros, or if it should be signed or unsigned;
+ currently assuming: NUM does not include the 12 zeros, and is unsigned *)
+ if not (iskbituimm 20 $4) then failwith "immediate is not 20bit"
+ else `RISCVUTYPE ($4, $2, $1.op) }
| JAL reg COMMA NUM
- { `RISCVJAL($4, $2) }
+ { if not ($4 mod 2 = 0) then failwith "odd offset"
+ else if not (iskbitsimm 21 $4) then failwith "offset is not 21bit"
+ else `RISCVJAL ($4, $2) }
| JALR reg COMMA reg COMMA NUM
- { `RISCVJALR($6, $4, $2) }
+ { if not (iskbitsimm 12 $6) then failwith "offset is not 12bit"
+ else `RISCVJALR ($6, $4, $2) }
| BTYPE reg COMMA reg COMMA NUM
- { `RISCVBType($6, $4, $2, $1.op) }
+ { if not ($6 mod 2 = 0) then failwith "odd offset"
+ else if not (iskbitsimm 13 $6) then failwith "offset is not 13bit"
+ else `RISCVBType ($6, $4, $2, $1.op) }
| ITYPE reg COMMA reg COMMA NUM
- { `RISCVIType($6, $4, $2, $1.op) }
+ { if $1.op <> RISCVSLTIU && not (iskbitsimm 12 $6) then failwith "immediate is not 12bit"
+ else if $1.op = RISCVSLTIU && not (iskbituimm 12 $6) then failwith "unsigned immediate is not 12bit"
+ else `RISCVIType ($6, $4, $2, $1.op) }
+| ADDIW reg COMMA reg COMMA NUM
+ { if not (iskbitsimm 12 $6) then failwith "immediate is not 12bit"
+ else `RISCVADDIW ($6, $4, $2) }
| SHIFTIOP reg COMMA reg COMMA NUM
- { `RISCVShiftIop($6, $4, $2, $1.op) }
+ { if not (iskbituimm 6 $6) then failwith "unsigned immediate is not 6bit"
+ else `RISCVShiftIop ($6, $4, $2, $1.op) }
+| SHIFTW reg COMMA reg COMMA NUM
+ { if not (iskbituimm 5 $6) then failwith "unsigned immediate is not 5bit"
+ else `RISCVSHIFTW ($6, $4, $2, $1.op) }
| RTYPE reg COMMA reg COMMA reg
{ `RISCVRType ($6, $4, $2, $1.op) }
| LOAD reg COMMA NUM LPAR reg RPAR
- { `RISCVLoad($4, $6, $2, $1.unsigned, $1.width, $1.aq, $1.rl) }
+ { if not (iskbitsimm 12 $4) then failwith "offset is not 12bit"
+ else `RISCVLoad ($4, $6, $2, $1.unsigned, $1.width, $1.aq, $1.rl) }
| STORE reg COMMA NUM LPAR reg RPAR
- { `RISCVStore($4, $2, $6, $1.width, $1.aq, $1.rl) }
-| ADDIW reg COMMA reg COMMA NUM
- { `RISCVADDIW ($6, $4, $2) }
-| SHIFTW reg COMMA reg COMMA NUM
- { `RISCVSHIFTW ($6, $4, $2, $1.op) }
+ { if not (iskbitsimm 12 $4) then failwith "offset is not 12bit"
+ else `RISCVStore ($4, $2, $6, $1.width, $1.aq, $1.rl) }
| RTYPEW reg COMMA reg COMMA reg
{ `RISCVRTYPEW ($6, $4, $2, $1.op) }
| FENCE FENCEOPTION COMMA FENCEOPTION
@@ -37,17 +53,22 @@
| FENCEI
{ `RISCVFENCEI }
| LOADRES reg COMMA LPAR reg RPAR
- { `RISCVLoadRes($1.aq, $1.rl, $5, $1.width, $2) }
+ { `RISCVLoadRes ($1.aq, $1.rl, $5, $1.width, $2) }
| LOADRES reg COMMA NUM LPAR reg RPAR
{ if $4 <> 0 then failwith "'lr' offset must be 0" else
- `RISCVLoadRes($1.aq, $1.rl, $6, $1.width, $2) }
+ `RISCVLoadRes ($1.aq, $1.rl, $6, $1.width, $2) }
| STORECON reg COMMA reg COMMA LPAR reg RPAR
- { `RISCVStoreCon($1.aq, $1.rl, $4, $7, $1.width, $2) }
+ { `RISCVStoreCon ($1.aq, $1.rl, $4, $7, $1.width, $2) }
| STORECON reg COMMA reg COMMA NUM LPAR reg RPAR
{ if $6 <> 0 then failwith "'sc' offset must be 0" else
- `RISCVStoreCon($1.aq, $1.rl, $4, $8, $1.width, $2) }
+ `RISCVStoreCon ($1.aq, $1.rl, $4, $8, $1.width, $2) }
| AMO reg COMMA reg COMMA LPAR reg RPAR
- { `RISCVAMO($1.op, $1.aq, $1.rl, $4, $7, $1.width, $2) }
+ { `RISCVAMO ($1.op, $1.aq, $1.rl, $4, $7, $1.width, $2) }
| AMO reg COMMA reg COMMA NUM LPAR reg RPAR
{ if $6 <> 0 then failwith "'amo<op>' offset must be 0" else
- `RISCVAMO($1.op, $1.aq, $1.rl, $4, $8, $1.width, $2) }
+ `RISCVAMO ($1.op, $1.aq, $1.rl, $4, $8, $1.width, $2) }
+
+/* pseudo-ops */
+| LI reg COMMA NUM
+ { if not (iskbitsimm 12 $4) then failwith "immediate is not 12bit (li is currently implemented only with small immediate)"
+ else `RISCVIType ($4, IReg R0, $2, RISCVORI) }
diff --git a/risc-v/hgen/token_types.hgen b/risc-v/hgen/token_types.hgen
index d338d865..f29e318d 100644
--- a/risc-v/hgen/token_types.hgen
+++ b/risc-v/hgen/token_types.hgen
@@ -17,3 +17,7 @@ type token_StoreCon = {width : wordWidth; aq: bool; rl: bool }
type token_AMO = {width : wordWidth; aq: bool; rl: bool; op: riscvAmoop }
type token_FENCEOPTION = Fence_R | Fence_W | Fence_RW
+
+(* pseudo-ops *)
+
+type token_LI = unit
diff --git a/risc-v/hgen/tokens.hgen b/risc-v/hgen/tokens.hgen
index b0cf1d88..f812adbd 100644
--- a/risc-v/hgen/tokens.hgen
+++ b/risc-v/hgen/tokens.hgen
@@ -15,4 +15,5 @@
%token <RISCVHGenBase.token_FENCEI> FENCEI
%token <RISCVHGenBase.token_LoadRes> LOADRES
%token <RISCVHGenBase.token_StoreCon> STORECON
-%token <RISCVHGenBase.token_AMO> AMO
+%token <RISCVHGenBase.token_AMO> AMO
+%token <RISCVHGenBase.token_LI> LI