diff options
| author | Shaked Flur | 2017-09-11 10:36:55 +0100 |
|---|---|---|
| committer | Shaked Flur | 2017-09-11 10:36:55 +0100 |
| commit | 53f13aeb3ff1289d92211aec6181cf178df82993 (patch) | |
| tree | 5936cf2972c93969c70749d3e0c02ce2e1e4f3f5 /risc-v | |
| parent | c5b352f9fb87c1d42d93df4cb39cce7a0f8e0ff0 (diff) | |
added xml pp
Diffstat (limited to 'risc-v')
| -rw-r--r-- | risc-v/hgen/pretty_xml.hgen | 137 | ||||
| -rw-r--r-- | risc-v/hgen/types.hgen | 53 |
2 files changed, 159 insertions, 31 deletions
diff --git a/risc-v/hgen/pretty_xml.hgen b/risc-v/hgen/pretty_xml.hgen new file mode 100644 index 00000000..b0306161 --- /dev/null +++ b/risc-v/hgen/pretty_xml.hgen @@ -0,0 +1,137 @@ +| `RISCVThreadStart -> ("op_thread_start", []) + +| `RISCVStopFetching -> ("op_stop_fetching", []) + +| `RISCVUTYPE(imm, rd, op) -> + ("op_U_type", + [ ("op", pp_riscv_uop op); + ("uimm", sprintf "%d" imm); + ("dest", pp_reg rd); + ]) + +| `RISCVJAL(imm, rd) -> + ("op_jal", + [ ("offset", sprintf "%d" imm); + ("dest", pp_reg rd); + ]) + +| `RISCVJALR(imm, rs1, rd) -> + ("op_jalr", + [ ("offset", sprintf "%d" imm); + ("base", pp_reg rs1); + ("dest", pp_reg rd); + ]) + +| `RISCVBType(imm, rs2, rs1, op) -> + ("op_branch", + [ ("op", pp_riscv_bop op); + ("offset", sprintf "%d" imm); + ("src2", pp_reg rs2); + ("src1", pp_reg rs1); + ]) + +| `RISCVIType(imm, rs1, rd, op) -> + ("op_I_type", + [ ("op", pp_riscv_iop op); + ("iimm", sprintf "%d" imm); + ("src", pp_reg rs1); + ("dest", pp_reg rd); + ]) + +| `RISCVShiftIop(imm, rs1, rd, op) -> + ("op_IS_type", + [ ("op", pp_riscv_sop op); + ("shamt", sprintf "%d" imm); + ("src", pp_reg rs1); + ("dest", pp_reg rd); + ]) + +| `RISCVSHIFTW(imm, rs1, rd, op) -> + ("op_ISW_type", + [ ("op", pp_riscv_sop op); + ("shamt", sprintf "%d" imm); + ("src", pp_reg rs1); + ("dest", pp_reg rd); + ]) + +| `RISCVRType (rs2, rs1, rd, op) -> + ("op_R_type", + [ ("op", pp_riscv_rop op); + ("src2", pp_reg rs2); + ("src1", pp_reg rs1); + ("dest", pp_reg rd); + ]) + +| `RISCVLoad(imm, rs1, rd, unsigned, width, aq, rl) -> + ("op_load", + [ ("aq", if aq then "true" else "false"); + ("rl", if rl then "true" else "false"); + ("width", pp_word_width width); + ("unsigned", if unsigned then "true" else "false"); + ("base", pp_reg rs1); + ("offset", sprintf "%d" imm); + ("dest", pp_reg rd); + ]) + +| `RISCVStore(imm, rs2, rs1, width, aq, rl) -> + ("op_store", + [ ("aq", if aq then "true" else "false"); + ("rl", if rl then "true" else "false"); + ("width", pp_word_width width); + ("src", pp_reg rs2); + ("base", pp_reg rs1); + ("offset", sprintf "%d" imm); + ]) + +| `RISCVADDIW(imm, rs1, rd) -> + ("op_addiw", + [ ("iimm", sprintf "%d" imm); + ("src", pp_reg rs1); + ("dest", pp_reg rd); + ]) + +| `RISCVRTYPEW(rs2, rs1, rd, op) -> + ("op_RW_type", + [ ("op", pp_riscv_ropw op); + ("src2", pp_reg rs2); + ("src1", pp_reg rs1); + ("dest", pp_reg rd); + ]) + +| `RISCVFENCE(pred, succ) -> + ("op_fence", + [ ("pred", pp_riscv_fence_option pred); + ("succ", pp_riscv_fence_option succ); + ]) + +| `RISCVFENCEI -> ("op_fence_i", []) + +| `RISCVLoadRes(aq, rl, rs1, width, rd) -> + ("op_lr", + [ ("aq", if aq then "true" else "false"); + ("rl", if rl then "true" else "false"); + ("width", pp_word_width width); + ("addr", pp_reg rs1); + ("dest", pp_reg rd); + ]) + +| `RISCVStoreCon(aq, rl, rs2, rs1, width, rd) -> + ("op_sc", + [ ("aq", if aq then "true" else "false"); + ("rl", if rl then "true" else "false"); + ("width", pp_word_width width); + ("addr", pp_reg rs1); + ("src", pp_reg rs2); + ("dest", pp_reg rd); + ]) + +| `RISCVAMO(op, aq, rl, rs2, rs1, width, rd) -> + ("op_amo", + [ ("op", pp_riscv_amo_op_part op); + ("aq", if aq then "true" else "false"); + ("rl", if rl then "true" else "false"); + ("width", pp_word_width width); + ("src", pp_reg rs2); + ("addr", pp_reg rs1); + ("dest", pp_reg rd); + ]) diff --git a/risc-v/hgen/types.hgen b/risc-v/hgen/types.hgen index e0caed2d..a0b75606 100644 --- a/risc-v/hgen/types.hgen +++ b/risc-v/hgen/types.hgen @@ -99,46 +99,36 @@ type wordWidth = | RISCVWORD | RISCVDOUBLE +let pp_word_width width : string = + begin match width with + | RISCVBYTE -> "b" + | RISCVHALF -> "h" + | RISCVWORD -> "w" + | RISCVDOUBLE -> "d" + end + let pp_riscv_load_op (unsigned, width, aq, rl) = - begin match (unsigned, width) with - | (false, RISCVBYTE) -> "lb" - | (true, RISCVBYTE) -> "lbu" - | (false, RISCVHALF) -> "lh" - | (true, RISCVHALF) -> "lhu" - | (false, RISCVWORD) -> "lw" - | (true, RISCVWORD) -> "lwu" - | (_, RISCVDOUBLE) -> "ld" - end ^ + "l" ^ + (pp_word_width width) ^ + (if unsigned then "u" else "") ^ (if aq then ".aq" else "") ^ (if rl then ".rl" else "") let pp_riscv_store_op (width, aq, rl) = - begin match width with - | RISCVBYTE -> "sb" - | RISCVHALF -> "sh" - | RISCVWORD -> "sw" - | RISCVDOUBLE -> "sd" - end ^ + "s" ^ + (pp_word_width width) ^ (if aq then ".aq" else "") ^ (if rl then ".rl" else "") let pp_riscv_load_reserved_op (aq, rl, width) = - "lr" ^ - begin match width with - | RISCVWORD -> ".w" - | RISCVDOUBLE -> ".d" - | _ -> assert false - end ^ + "lr." ^ + (pp_word_width width) ^ (if aq then ".aq" else "") ^ (if rl then ".rl" else "") let pp_riscv_store_conditional_op (aq, rl, width) = - "sc" ^ - begin match width with - | RISCVWORD -> ".w" - | RISCVDOUBLE -> ".d" - | _ -> assert false - end ^ + "sc." ^ + (pp_word_width width) ^ (if aq then ".aq" else "") ^ (if rl then ".rl" else "") @@ -153,9 +143,7 @@ type riscvAmoop = | RISCVAMOMINU | RISCVAMOMAXU -let pp_riscv_amo_op (op, aq, rl, width) = - "amo" ^ - begin match op with +let pp_riscv_amo_op_part = function | RISCVAMOSWAP -> "swap" | RISCVAMOADD -> "add" | RISCVAMOXOR -> "xor" @@ -165,7 +153,10 @@ let pp_riscv_amo_op (op, aq, rl, width) = | RISCVAMOMAX -> "max" | RISCVAMOMINU -> "minu" | RISCVAMOMAXU -> "maxu" - end ^ + +let pp_riscv_amo_op (op, aq, rl, width) = + "amo" ^ + pp_riscv_amo_op_part op ^ begin match width with | RISCVWORD -> ".w" | RISCVDOUBLE -> ".d" |
