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| author | Shaked Flur | 2017-11-01 14:17:08 +0000 |
|---|---|---|
| committer | Shaked Flur | 2017-11-01 14:17:08 +0000 |
| commit | 8e5d44d17c71cf946e65e15de8df42de2af4c652 (patch) | |
| tree | b3611980594a34c65475887377e4afb55a983526 /risc-v/riscv.sail | |
| parent | 701d572adda905e6b2098a73c9af56f98212b4a3 (diff) | |
added RISC-V "fence r,r"
Diffstat (limited to 'risc-v/riscv.sail')
| -rw-r--r-- | risc-v/riscv.sail | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/risc-v/riscv.sail b/risc-v/riscv.sail index 4938aaca..e0a6efba 100644 --- a/risc-v/riscv.sail +++ b/risc-v/riscv.sail @@ -260,6 +260,7 @@ function clause execute (FENCE(pred, succ)) = { switch(pred, succ) { case (0b0011, 0b0011) -> MEM_fence_rw_rw() case (0b0010, 0b0011) -> MEM_fence_r_rw() + case (0b0010, 0b0010) -> MEM_fence_r_r() case (0b0011, 0b0001) -> MEM_fence_rw_w() case (0b0001, 0b0001) -> MEM_fence_w_w() case _ -> not_implemented("unsupported fence") |