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authorRobert Norton2017-03-29 16:55:22 +0100
committerRobert Norton2017-03-29 16:55:22 +0100
commit55235837d2e89291324d9b92e737c23220511fbc (patch)
tree36723181403eb9c60c9cdf97ff1a6e1657158303 /mips
parent504524ee4d0576f1b90609d54ce642596c9fe13a (diff)
change reqiured to work with little endian interpreter.
Diffstat (limited to 'mips')
-rw-r--r--mips/mips_insts.sail2
-rw-r--r--mips/mips_prelude.sail13
-rw-r--r--mips/mips_wrappers.sail4
3 files changed, 15 insertions, 4 deletions
diff --git a/mips/mips_insts.sail b/mips/mips_insts.sail
index 07ded875..285d3011 100644
--- a/mips/mips_insts.sail
+++ b/mips/mips_insts.sail
@@ -1129,7 +1129,7 @@ function clause execute (Load(width, signed, linked, base, rt, offset)) =
{
CP0LLBit := 0b1;
CP0LLAddr := pAddr;
- MEMr_reserve(pAddr, wordWidthBytes(width));
+ MEMr_reserve_wrapper(pAddr, wordWidthBytes(width));
}
else
MEMr_wrapper(pAddr, wordWidthBytes(width));
diff --git a/mips/mips_prelude.sail b/mips/mips_prelude.sail
index 3643d211..22e2f138 100644
--- a/mips/mips_prelude.sail
+++ b/mips/mips_prelude.sail
@@ -574,6 +574,14 @@ function (bool) isAddressAligned (addr, (WordType) wordType) =
let a = unsigned(addr) in
((a quot alignment_width) == (a + wordWidthBytes(wordType) - 1) quot alignment_width)
+val forall Nat 'W. bit[8 * 'W] -> bit[8 * 'W] effect pure reverse_endianness
+function rec forall Nat 'W . bit[8 * 'W] reverse_endianness ((bit[8 * 'W]) value) =
+{
+ (nat) width := length(value);
+ if width <= 8 then value
+ else value[7..0] : reverse_endianness(value[(width - 1) .. 8])
+}
+
function forall Nat 'n. (bit[8 * 'n]) effect { rmem } MEMr_wrapper ((bit[64]) addr, ([:'n:]) size) =
if (addr == 0x000000007f000000) then
{
@@ -586,4 +594,7 @@ function forall Nat 'n. (bit[8 * 'n]) effect { rmem } MEMr_wrapper ((bit[64]) ad
else if (addr == 0x000000007f000004) then
mask(0x000000000004ffff) (* Always plenty of write space available and jtag activity *)
else
- MEMr(addr, size)
+ reverse_endianness(MEMr(addr, size)) (* MEMr assumes little endian *)
+
+function forall Nat 'n. (bit[8 * 'n]) effect { rmem } MEMr_reserve_wrapper ((bit[64]) addr , ([:'n:]) size) =
+ reverse_endianness(MEMr_reserve(addr, size))
diff --git a/mips/mips_wrappers.sail b/mips/mips_wrappers.sail
index 357aa9dd..b70853f0 100644
--- a/mips/mips_wrappers.sail
+++ b/mips/mips_wrappers.sail
@@ -42,13 +42,13 @@ function unit effect {wmem} MEMw_wrapper(addr, size, data) =
UART_WRITTEN := 1;
} else {
MEMea(addr, size);
- MEMval(addr, size, data);
+ MEMval(addr, size, reverse_endianness(data));
}
function bool effect {wmem} MEMw_conditional_wrapper(addr, size, data) =
{
MEMea_conditional(addr, size);
- MEMval_conditional(addr, size, data)
+ MEMval_conditional(addr, size, reverse_endianness(data))
}
function bit[64] addrWrapper((bit[64]) addr, (MemAccessType) accessType, (WordType) width) =