diff options
| author | Christopher | 2016-07-13 12:38:14 +0100 |
|---|---|---|
| committer | Christopher | 2016-07-13 12:38:14 +0100 |
| commit | 0edd0cd209e163b5cb6af3e62a83aacd63c78fa3 (patch) | |
| tree | caa67d9db5379ac55218f9050e9b732248fd1f62 /mips | |
| parent | 685df2b09b5df2781a1daa8f6d12e3a2aec70ea2 (diff) | |
fix
Diffstat (limited to 'mips')
| -rw-r--r-- | mips/mips_prelude.sail | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/mips/mips_prelude.sail b/mips/mips_prelude.sail index 5be1a3cc..a490efb9 100644 --- a/mips/mips_prelude.sail +++ b/mips/mips_prelude.sail @@ -152,7 +152,6 @@ register (bit[1]) CP0LLBit register (bit[64]) CP0LLAddr register (bit[64]) CP0BadVAddr register (bit[32]) CP0Count -register (bit[32]) CP0Compare register (bit[32]) CP0HWREna register (bit[64]) CP0UserLocal @@ -277,7 +276,6 @@ function (bit[5]) ExceptionCode ((Exception) ex) = } -val Exception -> unit effect {rreg, wreg} SignalException function unit SignalExceptionMIPS ((Exception) ex, (bit[64]) kccBase) = { @@ -318,6 +316,8 @@ function unit SignalExceptionMIPS ((Exception) ex, (bit[64]) kccBase) = CP0Status.EXL := 1; } +val Exception -> unit effect {rreg, wreg} SignalException + function unit SignalExceptionBadAddr((Exception) ex, (bit[64]) badAddr) = { CP0BadVAddr := badAddr; |
