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authorRobert Norton2018-03-08 16:48:02 +0000
committerRobert Norton2018-03-08 16:48:02 +0000
commit9e48920689ed4290f0bf155d604292143d5f5ffa (patch)
tree4a75b96b8ca7d5d0cefbb8ab83b81934cc9ed84c /mips/mips_extras_embed.lem
parentbc2a83a24bda7a56d2dd08ce0bb1593076965513 (diff)
Remove files in mips directory prior to copying in files from mips_new_tc. Hopefully thiis will help git to spot the rename and hence preserve history.
Diffstat (limited to 'mips/mips_extras_embed.lem')
-rw-r--r--mips/mips_extras_embed.lem53
1 files changed, 0 insertions, 53 deletions
diff --git a/mips/mips_extras_embed.lem b/mips/mips_extras_embed.lem
deleted file mode 100644
index 8abc9747..00000000
--- a/mips/mips_extras_embed.lem
+++ /dev/null
@@ -1,53 +0,0 @@
-open import Pervasives
-open import Pervasives_extra
-open import Sail_impl_base
-open import Sail_values
-open import Prompt
-
-val MEMr : (vector bitU * integer) -> M (vector bitU)
-val MEMr_reserve : (vector bitU * integer) -> M (vector bitU)
-val MEMr_tag : (vector bitU * integer) -> M (vector bitU)
-val MEMr_tag_reserve : (vector bitU * integer) -> M (vector bitU)
-
-let MEMr (addr,size) = read_mem false Read_plain addr size
-let MEMr_reserve (addr,size) = read_mem false Read_reserve addr size
-
-let MEMr_tag (addr,size) = read_mem false Read_plain addr size
-let MEMr_tag_reserve (addr,size) = read_mem false Read_reserve addr size
-
-
-val MEMea : (vector bitU * integer) -> M unit
-val MEMea_conditional : (vector bitU * integer) -> M unit
-val MEMea_tag : (vector bitU * integer) -> M unit
-val MEMea_tag_conditional : (vector bitU * integer) -> M unit
-
-let MEMea (addr,size) = write_mem_ea Write_plain addr size
-let MEMea_conditional (addr,size) = write_mem_ea Write_conditional addr size
-
-let MEMea_tag (addr,size) = write_mem_ea Write_plain addr size
-let MEMea_tag_conditional (addr,size) = write_mem_ea Write_conditional addr size
-
-
-val MEMval : (vector bitU * integer * vector bitU) -> M unit
-val MEMval_conditional : (vector bitU * integer * vector bitU) -> M bitU
-val MEMval_tag : (vector bitU * integer * vector bitU) -> M unit
-val MEMval_tag_conditional : (vector bitU * integer * vector bitU) -> M bitU
-
-let MEMval (_,_,v) = write_mem_val v >>= fun _ -> return ()
-let MEMval_conditional (_,_,v) = write_mem_val v >>= fun b -> return (if b then B1 else B0)
-let MEMval_tag (_,_,v) = write_mem_val v >>= fun _ -> return ()
-let MEMval_tag_conditional (_,_,v) = write_mem_val v >>= fun b -> return (if b then B1 else B0)
-
-(* TODO *)
-val TAGw : (vector bitU * vector bitU) -> M unit
-let TAGw (addr, tag) = failwith "TAGw not implemented"
-
-val MEM_sync : unit -> M unit
-
-let MEM_sync () = barrier Barrier_Isync
-
-
-let duplicate (bit,len) =
- let bits = repeat [bit] len in
- let start = len - 1 in
- Vector bits start false