diff options
| author | Kathy Gray | 2016-01-27 13:47:21 +0000 |
|---|---|---|
| committer | Kathy Gray | 2016-01-27 13:47:21 +0000 |
| commit | e3a00ca2fbdb6b3fb45568ac69a3b2b87ae97b60 (patch) | |
| tree | e04139d47f496c4eac2193f3b608591ab049b21d /mips/mips.sail | |
| parent | 881ae74c13a9de710d13598e5cd77498c7f33aca (diff) | |
actually commit the new mips file
Diffstat (limited to 'mips/mips.sail')
| -rw-r--r-- | mips/mips.sail | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/mips/mips.sail b/mips/mips.sail index 4d4399f6..7c3a4db1 100644 --- a/mips/mips.sail +++ b/mips/mips.sail @@ -1518,7 +1518,7 @@ function clause execute (MTC0(rt, rd, sel, double)) = let reg_val = (rGPR(rt)) in switch (rd, sel) { - case (0b01011,0b000) -> {CP0Compare := reg_val[31..0]; (CP0Cause.IP)[0] := 0} (* 11, sel 0: Compare reg *) + case (0b01011,0b000) -> {CP0Compare := reg_val[31..0]; (CP0Cause.IP)[8] := 0} (* 11, sel 0: Compare reg *) case (0b01100,0b000) -> CP0Status := reg_val[31..0] case (0b01111,0b000) -> () (* 15, sel 0: PrID processor ID *) case (0b01111,0b110) -> () (* 15, sel 6: CHERI core ID *) |