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authorRobert Norton2016-02-03 17:29:53 +0000
committerRobert Norton2016-02-03 17:29:53 +0000
commitb93ee1a8e09e60239792897c28ca2eced0746f25 (patch)
tree2daddedfc4f884b4f6d3abeb481c3dc9a4df869a /mips/mips.sail
parenta5c6e57fdf714ab694cd560ab54c649258859945 (diff)
mips: add support for LLAddr, a debug register used for ll/sc. Also add missing psuedo-registers in run_with_elf.
Diffstat (limited to 'mips/mips.sail')
-rw-r--r--mips/mips.sail5
1 files changed, 4 insertions, 1 deletions
diff --git a/mips/mips.sail b/mips/mips.sail
index 81ab5583..35dcc2d8 100644
--- a/mips/mips.sail
+++ b/mips/mips.sail
@@ -28,6 +28,7 @@ register (CauseReg) CP0Cause
register (bit[64]) CP0EPC
register (bit[64]) CP0ErrorEPC
register (bit[1]) CP0LLBit
+register (bit[64]) CP0LLAddr
register (bit[64]) CP0BadVAddr
typedef StatusReg = register bits [31:0] {
@@ -1274,7 +1275,8 @@ function clause execute (Load(width, signed, linked, base, rt, offset)) =
{
memResult := if (linked) then
{
- CP0LLBit := 0b1;
+ CP0LLBit := 0b1;
+ CP0LLAddr := pAddr;
MEMr_reserve(pAddr, wordWidthBytes(width));
}
else
@@ -1565,6 +1567,7 @@ function clause execute (MFC0(rt, rd, sel, double)) =
: 0b0000 (* zero *)
: 0b000) (* K0 TODO should be writable*)
case (0b10000,0b001) -> 0 (* 16, sel 1: Config1 *)
+ case (0b10001,0b000) -> CP0LLAddr (* 17, sel 0: LLAddr *)
case _ -> {SignalException(ResI); 0}
} in
wGPR(rt) := if (double) then result else EXTS(result[31..0])