summaryrefslogtreecommitdiff
path: root/mips/mips.sail
diff options
context:
space:
mode:
authorChristopher2015-12-21 00:26:05 +0100
committerChristopher2015-12-21 00:26:05 +0100
commit3b2484a8d10a35b31b6071e39fd2c3018b007b46 (patch)
tree5140f78857680aa6fce48fcff946e0773045f2a9 /mips/mips.sail
parentce7431d8e452952329439564969f8b592a01563b (diff)
parentf7a642bd3f8a5436873d0163114a30dad23ba9c2 (diff)
Merge branch 'master' of https://bitbucket.org/Peter_Sewell/l2
Diffstat (limited to 'mips/mips.sail')
-rw-r--r--mips/mips.sail4
1 files changed, 2 insertions, 2 deletions
diff --git a/mips/mips.sail b/mips/mips.sail
index b18f3cda..ff34c67e 100644
--- a/mips/mips.sail
+++ b/mips/mips.sail
@@ -1,10 +1,10 @@
(* bit vectors have indices decreasing from left i.e. msb is highest index *)
default Order dec
-(* external functions *)
+(*(* external functions *)
val extern forall Nat 'm, Nat 'n. (implicit<'m>,bit['n]) -> bit['m] effect pure EXTS (* Sign extend *)
val extern forall Nat 'n, Nat 'm. (implicit<'m>,bit['n]) -> bit['m] effect pure EXTZ (* Zero extend *)
-
+*)
register (bit[64]) PC
(* CP0 Registers *)