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| author | Brian Campbell | 2017-07-14 16:56:33 +0100 |
|---|---|---|
| committer | Brian Campbell | 2017-07-14 16:56:33 +0100 |
| commit | c63f9086a721c902c2b5c170758c7c63f02330f8 (patch) | |
| tree | ca98b92e1ae5b6e27248ef8c8b7c192c90ddaedb /lib/prelude.sail | |
| parent | c49a604375e00fe7e4058ea7327598201542d5cd (diff) | |
Correct signedness bugs in mips_new_tc.
Diffstat (limited to 'lib/prelude.sail')
| -rw-r--r-- | lib/prelude.sail | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/lib/prelude.sail b/lib/prelude.sail index 9a52e5fb..48160749 100644 --- a/lib/prelude.sail +++ b/lib/prelude.sail @@ -64,7 +64,9 @@ val forall Num 'n, Num 'm, Num 'o, Num 'p, Order 'ord. val forall Num 'm, Num 'p, Order 'ord. list<bit> -> vector<'p, 'm, 'ord, bit> effect pure exts_bl -val cast forall Num 'n, Num 'm, Num 'o, Num 'p, Order 'ord, 'm >= 'n. +(* If we want an automatic bitvector extension, then this is the function to + use, but I've disabled the cast because it hides signedness bugs. *) +val (*cast*) forall Num 'n, Num 'm, Num 'o, Num 'p, Order 'ord, 'm >= 'n. vector<'o, 'n, 'ord, bit> -> vector<'p, 'm, 'ord, bit> effect pure extzi overload EXTZ [extz; extz_bl] |