summaryrefslogtreecommitdiff
path: root/lib/isabelle
diff options
context:
space:
mode:
authorThomas Bauereiss2018-01-22 20:56:07 +0000
committerThomas Bauereiss2018-01-22 22:10:44 +0000
commitb3f5dd5bac689bee9770081215bd0b1fe1071084 (patch)
tree1953899ef9810ee5c60640a7b28e3f465a3cba0e /lib/isabelle
parent4cafba567b6610b239ab6b82b89073a1a8a49632 (diff)
Update Lem shallow embedding to Sail2
- Remove vector start indices - Library refactoring: Definitions in sail_operators.lem now use Bitvector type class and work for both bit list and machine word representations - Add Lem bindings to AArch64 and RISC-V preludes TODO: Merge specialised machine word operations from sail_operators_mwords into sail_operators.
Diffstat (limited to 'lib/isabelle')
-rw-r--r--lib/isabelle/Makefile2
-rw-r--r--lib/isabelle/ROOT1
2 files changed, 1 insertions, 2 deletions
diff --git a/lib/isabelle/Makefile b/lib/isabelle/Makefile
index f340b81b..5ff58069 100644
--- a/lib/isabelle/Makefile
+++ b/lib/isabelle/Makefile
@@ -1,4 +1,4 @@
-THYS = Sail_impl_base.thy Sail_values.thy Sail_operators.thy Sail_operators_mwords.thy State.thy Prompt.thy
+THYS = Sail_impl_base.thy Sail_values.thy Sail_operators.thy State.thy Prompt.thy
.PHONY: all heap-img clean
diff --git a/lib/isabelle/ROOT b/lib/isabelle/ROOT
index 7e90cdf0..2062b64b 100644
--- a/lib/isabelle/ROOT
+++ b/lib/isabelle/ROOT
@@ -5,7 +5,6 @@ session "Sail" = "LEM" +
State
Prompt
Sail_operators
- Sail_operators_mwords
(*session "Sail" = "Sail_Base" +
options [document = false]