diff options
| author | Thomas Bauereiss | 2018-03-05 12:13:16 +0000 |
|---|---|---|
| committer | Thomas Bauereiss | 2018-03-05 15:44:58 +0000 |
| commit | 21bb415d3c148361033576af6093f72f49d92866 (patch) | |
| tree | 53d87a289a6b089c4da9644a16e43086f17c05b3 /lib/isabelle/Prompt_monad_lemmas.thy | |
| parent | ea2ff78cf675298df64e8ebacca7156b68f3c5c8 (diff) | |
Add support for undefined bit oracle to Lem shallow embedding
Add an Undefined outcome to the prompt monad that asks the environment for a
Boolean value. For the state monad, add fields for a random generator and a
seed (currently of type nat) to the state.
Diffstat (limited to 'lib/isabelle/Prompt_monad_lemmas.thy')
| -rw-r--r-- | lib/isabelle/Prompt_monad_lemmas.thy | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/lib/isabelle/Prompt_monad_lemmas.thy b/lib/isabelle/Prompt_monad_lemmas.thy index d2466764..ffed5afb 100644 --- a/lib/isabelle/Prompt_monad_lemmas.thy +++ b/lib/isabelle/Prompt_monad_lemmas.thy @@ -41,6 +41,7 @@ datatype 'regval event = | e_read_reg string 'regval (* Request to write register *) | e_write_reg string 'regval + | e_undefined bool inductive_set T :: "(('rv, 'a, 'e) monad \<times> 'rv event \<times> ('rv, 'a, 'e) monad) set" where Read_mem: "((Read_mem rk addr sz k), e_read_mem rk addr sz v, k v) \<in> T" @@ -53,6 +54,7 @@ inductive_set T :: "(('rv, 'a, 'e) monad \<times> 'rv event \<times> ('rv, 'a, ' | Barrier: "((Barrier bk k), e_barrier bk, k) \<in> T" | Read_reg: "((Read_reg r k), e_read_reg r v, k v) \<in> T" | Write_reg: "((Write_reg r v k), e_write_reg r v, k) \<in> T" +| Undefined : "((Undefined k), e_undefined v, k v) \<in> T" inductive_set Traces :: "(('rv, 'a, 'e) monad \<times> 'rv event list \<times> ('rv, 'a, 'e) monad) set" where Nil: "(s, [], s) \<in> Traces" @@ -82,6 +84,7 @@ lemma Traces_cases: | (Write_ea) wk addr s k t' where "m = Write_ea wk addr s k" and "t = e_write_ea wk addr s # t'" and "(k, t', m') \<in> Traces" | (Footprint) k t' where "m = Footprint k" and "t = e_footprint # t'" and "(k, t', m') \<in> Traces" | (Write_reg) reg v k t' where "m = Write_reg reg v k" and "t = e_write_reg reg v # t'" and "(k, t', m') \<in> Traces" + | (Undefined) v k t' where "m = Undefined k" and "t = e_undefined v # t'" and "(k v, t', m') \<in> Traces" proof (use Run in \<open>cases m t m' set: Traces\<close>) case Nil then show ?thesis by (auto intro: that(1)) |
