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| author | Robert Norton | 2016-06-07 15:03:31 +0100 |
|---|---|---|
| committer | Robert Norton | 2016-06-07 15:03:31 +0100 |
| commit | d65d53cecc077a1171c35fda326f30bb0b6425a3 (patch) | |
| tree | 0735887fb9be92b4d93cf76caef405d885291140 /cheri | |
| parent | 486ede4166e118af24b783d1efd0a667ada3b54a (diff) | |
Merge register access violation exception codes. ISA is evolving and is a little loose at the moment (does not specify what to do with deprecated permission bits).
Diffstat (limited to 'cheri')
| -rw-r--r-- | cheri/cheri_prelude.sail | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/cheri/cheri_prelude.sail b/cheri/cheri_prelude.sail index f9b33f35..eee1ac65 100644 --- a/cheri/cheri_prelude.sail +++ b/cheri/cheri_prelude.sail @@ -303,11 +303,11 @@ function (bit[8]) CapExCode((CapEx) ex) = case CapEx_PermitStoreCapViolation -> 0x15 case CapEx_PermitStoreLocalCapViolation -> 0x16 case CapEx_PermitSealViolation -> 0x17 - case CapEx_AccessEPCCViolation -> 0x1a - case CapEx_AccessKDCViolation -> 0x1b - case CapEx_AccessKCCViolation -> 0x1c - case CapEx_AccessKR1CViolation -> 0x1d - case CapEx_AccessKR2CViolation -> 0x1e + case CapEx_AccessEPCCViolation -> 0x18 + case CapEx_AccessKDCViolation -> 0x18 + case CapEx_AccessKCCViolation -> 0x18 + case CapEx_AccessKR1CViolation -> 0x18 + case CapEx_AccessKR2CViolation -> 0x18 } typedef CapCauseReg = register bits [15:0] { |