diff options
| author | Robert Norton | 2016-06-07 15:54:49 +0100 |
|---|---|---|
| committer | Robert Norton | 2016-06-07 15:54:49 +0100 |
| commit | cd178d215f5b893801f07cb1c06515e82a7abad1 (patch) | |
| tree | b8cca856d5de9861bd434e32684e16fe47a6de3d /cheri | |
| parent | d65d53cecc077a1171c35fda326f30bb0b6425a3 (diff) | |
remove workarounds for sail unable to read fields during PC fetch. Should be no functional change.
Diffstat (limited to 'cheri')
| -rw-r--r-- | cheri/cheri_prelude.sail | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/cheri/cheri_prelude.sail b/cheri/cheri_prelude.sail index eee1ac65..ec0ba6e8 100644 --- a/cheri/cheri_prelude.sail +++ b/cheri/cheri_prelude.sail @@ -447,10 +447,8 @@ function bit[64] addrWrapper((bit[64]) addr, (MemAccessType) accessType, (WordTy function (bit[64]) TranslateAddress ((bit[64]) vAddr, (MemAccessType) accessType) = { incrementCP0Count(); - (* XXX Sail does not allow reading fields here :-( *) - let (bit[257]) x = PCC in - let (bit[64]) base = x[127..64] in - let (bit[64]) length = x[63..0] in + let (bit[64]) base = PCC.base in + let (bit[64]) length = PCC.length in let (bit[64]) absPC = (base + vAddr) in if (absPC[1..0] != 0b00) then (* bad PC alignment *) exit (SignalExceptionBadAddr(AdEL, absPC)) |
