diff options
| author | Robert Norton | 2018-03-06 16:31:09 +0000 |
|---|---|---|
| committer | Robert Norton | 2018-03-06 16:31:18 +0000 |
| commit | afd2eb53449df925a863211af9d7a9cae56d88a2 (patch) | |
| tree | 8b593e2aa50c08155c37b3e78a6e40250b427e36 /cheri | |
| parent | 9c4b4f66347196cd0511d3a2f8d4f0056592ee6f (diff) | |
Check tag of pcc in TranslatePC. This could happen after an ERET with untagged EPCC. ISA says this results in undefined behaviour but it should probably not permit execution of code with untagged PCC.
Diffstat (limited to 'cheri')
| -rw-r--r-- | cheri/cheri_prelude_common.sail | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/cheri/cheri_prelude_common.sail b/cheri/cheri_prelude_common.sail index 0a491145..5dd14974 100644 --- a/cheri/cheri_prelude_common.sail +++ b/cheri/cheri_prelude_common.sail @@ -369,6 +369,8 @@ function TranslatePC (vAddr) = { let absPC = base + unsigned(vAddr); if ((absPC % 4) != 0) then /* bad PC alignment */ (SignalExceptionBadAddr(AdEL, to_bits(64, absPC))) /* XXX absPC may be truncated */ + else if not (pcc.tag) then + (raise_c2_exception_noreg(CapEx_TagViolation)) else if ((absPC + 4) > top) then (raise_c2_exception_noreg(CapEx_LengthViolation)) else |