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| author | Robert Norton | 2017-01-25 17:12:37 +0000 |
|---|---|---|
| committer | Robert Norton | 2017-01-25 17:12:43 +0000 |
| commit | 918435c853758f271090b1e0f3089692f98ef45e (patch) | |
| tree | aeb60f810fc0071f3d35f832b004d40a1d3d35e2 /cheri | |
| parent | 950ac43cc496319b263c87fbe47c45d06838c634 (diff) | |
fix error introduced in revised version of TranslateAddress -- absPC should be relative to base
Diffstat (limited to 'cheri')
| -rw-r--r-- | cheri/cheri_prelude_common.sail | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/cheri/cheri_prelude_common.sail b/cheri/cheri_prelude_common.sail index 1d9c00b4..7530c9cc 100644 --- a/cheri/cheri_prelude_common.sail +++ b/cheri/cheri_prelude_common.sail @@ -322,7 +322,7 @@ function (bit[64]) TranslateAddress ((bit[64]) vAddr, (MemAccessType) accessType let pcc = capRegToCapStruct(PCC) in let base = unsigned(getCapBase(pcc)) in let top = unsigned(getCapTop(pcc)) in - let absPC = (unsigned(vAddr)) in + let absPC = base + unsigned(vAddr) in if ((absPC mod 4) != 0) then (* bad PC alignment *) (SignalExceptionBadAddr(AdEL, (bit[64]) absPC)) (* XXX absPC may be truncated *) else if ((absPC + 4) > top) then |