Add minimal support for emulated Altera JTAG UART.

1 files changed, 6 insertions, 0 deletions

diff --git a/cheri/cheri_prelude.sail b/cheri/cheri_prelude.sail
index 9f39496f..23973782 100644
--- a/cheri/cheri_prelude.sail
+++ b/cheri/cheri_prelude.sail
@@ -431,6 +431,12 @@ function bool MEMw_tagged_conditional((bit[64]) addr, (bool) tag, (bit[cap_size_
 }
 
 function unit effect {wmem} MEMw_wrapper(addr, size, data) =
+  if (addr == 0x000000007f000000) then
+  {
+    UART_WDATA   := data[31..24];
+    UART_WRITTEN := 1;
+  }
+  else
   {
     (* On cheri non-capability writes must clear the corresponding tag*)
     TAGw((addr[63..5] : 0b00000), 0x00);