diff options
| author | Robert Norton | 2016-04-15 14:08:32 +0100 |
|---|---|---|
| committer | Robert Norton | 2016-04-15 14:08:35 +0100 |
| commit | 7e9524cb70edd40c7968667a6de12f09f6cfe29c (patch) | |
| tree | 708146406337d50845e1312ccf57a19c0d2eb4c0 /cheri | |
| parent | a2f4234ae03c80089cc25955f61f189a40ab33c2 (diff) | |
cheri: explicitly zero extend regno when writing to cap cause because implicit cast does not work as expected (appends zeros at bottom).
Diffstat (limited to 'cheri')
| -rw-r--r-- | cheri/cheri_prelude.sail | 11 |
1 files changed, 7 insertions, 4 deletions
diff --git a/cheri/cheri_prelude.sail b/cheri/cheri_prelude.sail index 527cf2c5..78bf019f 100644 --- a/cheri/cheri_prelude.sail +++ b/cheri/cheri_prelude.sail @@ -278,15 +278,18 @@ typedef CapCauseReg = register bits [15:0] { register CapCauseReg CapCause -function unit raise_c2_exception((CapEx) capEx, (bit[8]) regnum) = +function unit raise_c2_exception8((CapEx) capEx, (bit[8]) regnum) = { (CapCause.ExcCode) := CapExCode(capEx); (CapCause.RegNum) := regnum; SignalException(C2E); } -function unit raise_c2_exception_v((bit[8]) regnum) = - switch(regnum[4..0]) { +function unit raise_c2_exception((CapEx) capEx, (regno) regnum) = + raise_c2_exception8(capEx, 0b000 : regnum) + +function unit raise_c2_exception_v((regno) regnum) = + switch(regnum) { case 0b11011 -> raise_c2_exception(CapEx_AccessKR1CViolation, regnum) case 0b11100 -> raise_c2_exception(CapEx_AccessKR2CViolation, regnum) case 0b11101 -> raise_c2_exception(CapEx_AccessKCCViolation, regnum) @@ -296,7 +299,7 @@ function unit raise_c2_exception_v((bit[8]) regnum) = } function unit raise_c2_exception_noreg((CapEx) capEx) = - raise_c2_exception(capEx, 0xff) + raise_c2_exception8(capEx, 0xff) function bool register_inaccessible((regno) r) = ~(switch(r) { |