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authorRobert Norton2017-04-27 10:40:30 +0100
committerRobert Norton2017-04-27 10:40:30 +0100
commit0a4963271c28cea3aa3eabf2115f4a22a4c2fa23 (patch)
treebf60296e7c0fc6a5c141a76087e1a9c3aea131f5 /cheri
parentf5e585ab875399a926d02706cc9208539860f7b8 (diff)
reverse endianness of data when writing UART. Altera jtag uart is little-endian and this change allows it to work when writing using store word (as done by FreeBSD driver) or sb (as done by cheri helloworld program).
Diffstat (limited to 'cheri')
-rw-r--r--cheri/cheri_prelude_common.sail5
1 files changed, 3 insertions, 2 deletions
diff --git a/cheri/cheri_prelude_common.sail b/cheri/cheri_prelude_common.sail
index 89fd99bf..63af1021 100644
--- a/cheri/cheri_prelude_common.sail
+++ b/cheri/cheri_prelude_common.sail
@@ -261,9 +261,10 @@ function (bit[64]) align((bit[64]) addr, (nat) alignment) =
addr - remainder
function unit effect {wmem} MEMw_wrapper(addr, size, data) =
+ let ledata = reverse_endianness(data) in
if (addr == 0x000000007f000000) then
{
- UART_WDATA := data[7..0];
+ UART_WDATA := ledata[7..0];
UART_WRITTEN := 1;
}
else
@@ -273,7 +274,7 @@ function unit effect {wmem} MEMw_wrapper(addr, size, data) =
should probably be done in memory model. *)
TAGw(align(addr, cap_size), 0x00);
MEMea(addr,size);
- MEMval(addr, size, reverse_endianness(data));
+ MEMval(addr, size, ledata);
}
function bool effect {wmem} MEMw_conditional_wrapper(addr, size, data) =