diff options
| author | Robert Norton | 2017-05-25 15:53:16 +0100 |
|---|---|---|
| committer | Robert Norton | 2017-05-26 09:27:23 +0100 |
| commit | c950b7eecc36120368ce3e00f1f11ac23dd908f9 (patch) | |
| tree | 0406ad620339141c5191de268de2d14a3aa9a154 /cheri/cheri_prelude_common.sail | |
| parent | 817d87218d2470c9b8a89368209c97a709901717 (diff) | |
add support for the new ccall selector 1 implementation that directly unseals capabilities.
Diffstat (limited to 'cheri/cheri_prelude_common.sail')
| -rw-r--r-- | cheri/cheri_prelude_common.sail | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/cheri/cheri_prelude_common.sail b/cheri/cheri_prelude_common.sail index b839b282..13b18ac1 100644 --- a/cheri/cheri_prelude_common.sail +++ b/cheri/cheri_prelude_common.sail @@ -104,6 +104,7 @@ typedef CapEx = enumerate { CapEx_PermitStoreLocalCapViolation; CapEx_PermitSealViolation; CapEx_AccessSystemRegsViolation; + CapEx_PermitCCallViolation; } typedef CPtrCmpOp = enumerate { @@ -145,6 +146,7 @@ function (bit[8]) CapExCode((CapEx) ex) = case CapEx_PermitStoreLocalCapViolation -> 0x16 case CapEx_PermitSealViolation -> 0x17 case CapEx_AccessSystemRegsViolation -> 0x18 + case CapEx_PermitCCallViolation -> 0x19 } typedef CapCauseReg = register bits [15:0] { |
